User Guide

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3. Instantiate and configure AHBLite compliant peripheral cores and/or custom AHBLite compliant
components.
4. Connect the sub-system:
Connect the CoreAHBLite mirrored-master Bus Interface (BIF) port M1 to the MSS master
BIF port - FIC_0/1_AHB_MASTER - as shown in
Figure 5-6.
Connect the AHBLite slaves to the proper slots as per your memory map requirement.
Figure 5-5 • Master/AHBLite Master Access Configuration