User Guide
Table Of Contents
- Introduction
- 1 – MSS Configurator
- 2 – SmartDesign and MSS Configurator Actions
- 3 – Configuring the DDR_FIC Sub-System
- 4 – Configuring the SMC_FIC Sub-System
- 5 – Configuring the FIC Sub-Systems
- 6 – Configuring the FIC Sub-System Clocks
- 7 – Configuring the FIC Sub-System Reset
- 8 – Configuring the System Memory Map
- A – Product Support
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3. Instantiate and configure AHBLite compliant peripheral cores and/or custom AHBLite compliant
components.
4. Connect the sub-system:
– Connect the CoreAHBLite mirrored-master Bus Interface (BIF) port M1 to the MSS master
BIF port - FIC_0/1_AHB_MASTER - as shown in
Figure 5-6.
– Connect the AHBLite slaves to the proper slots as per your memory map requirement.
Figure 5-5 • Master/AHBLite Master Access Configuration