User Guide
Table Of Contents
- Introduction
- 1 – MSS Configurator
- 2 – SmartDesign and MSS Configurator Actions
- 3 – Configuring the DDR_FIC Sub-System
- 4 – Configuring the SMC_FIC Sub-System
- 5 – Configuring the FIC Sub-Systems
- 6 – Configuring the FIC Sub-System Clocks
- 7 – Configuring the FIC Sub-System Reset
- 8 – Configuring the System Memory Map
- A – Product Support
12
– Clocks and resets; refer to "Configuring the FIC Sub-System Clocks" on page 23 and
"Configuring the FIC Sub-System Reset" on page 27.
DDR_FIC/Two AHBLite Sub-System
When you select the two AHBLite Interfaces option for the MDDR, an additional BIF,
MDDR_DDR_AHB1_SLAVE BIF, is exposed at the MSS component for you to connect to the new slave.
For this configuration, repeat the steps for a single AHBLite configuration for the
MDDR_DDR_AHB1_SLAVE BIF Interface exposed on the MSS component.
Figure 3-5 • DDR_FIC AHBLite Sub-System