User Guide

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2. Instantiate and configure the AMBA AHBLite compliant master core or component that is
intended to master to the CoreAHBLite bus. If your application requires more than one master
onto the CoreAHBLite bus, instantiate the additional masters too. Up to four masters are
supported on the CoreAHBLite bus.
3. Connect the sub-system:
Connect the CoreAHBLite mirrored-master Bus Interface (BIF) port M0 (M1) to the master BIF
port of your master core instance(s).
Connect the MSS DDR_FIC slave BIF port - MDDR_DDR_AHB0_SLAVE - to the proper
CoreAHBLite bus mirrored-slave slot (S0 in this example) as per your memory map
requirement. If you have other slaves on that bus, connect them as well as per your memory
map.
Figure 3-4 • Core AHBLite - Combined Region Master Configuration