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(0B) CMOS status register initialize done. Keyboard controller command byte is
written. Going to issue Pin -23, 24 blocking/ unblocking command. Going to issue
pin -23, 24 blocking/ unblocking command. Refresh started. Parity status cleared.
(0C) KB controller I/B free. Going to issue the BAT command to keyboard controller.
Pin-3,24 of keyboard controller is blocked/unblocked. NOP command of keyboard
controller to be issued next. NOP command of keyboard controller to be issued
next. System timer started. Refresh & system timer OK.
(0D) BAT command to keyboard controller is issued. Going to verify the BAT
command. NOP command processing is done. CMOS shutdown register test to be
done next. CMOS shutdown register test to be done next. Refresh link toggling
passed. Refresh link toggling passed.
(0E) Keyboard controller BAT result verified. Any initialization after KB controller
BAT to be next. CMOS shut down register R/W test passed. Going to calculate
CMOS checksum, and update DIAG. Going to calculate CMOS checks um, and
update DIAG Byte. Refresh period ON/OFF 50% OK.
(0F) initialization after KB controller BAT done. Keyboard command byte to be
written next. CMOS checksum calculation is done, DIAG byte written. CMOS Init.
To begin (If "INIT C MOS IN EVERY BOOT IS SET"). CMOS initialization to begin (If
"INIT CMOS IN E VERY BOOT IS SET").
(10) KB controller command byte is written. Going to issue p in-23,24
blocking/unblocking command. CMOS initialization done(if any). CMOS status
register about to Init for Date and Time. CMOS status register about to Init for
Date and Time. Refresh on and about to start 64K base memory test. Confirmed
refresh ON & about to start 64 K memory.
(11) Pin23,24 of keyboard controller is blocked/unblocked. Going to check to
check pressing of <INS>key during power-on. CMOS status register initialized.
Going to disable DMA and Interrupt controllers. Going to disable DMA and
interrupt controllers. Address line test passed. Address line test passed.
(12) Checking for pressing of <INS> key during power-on done. Going to disable
DMA and Interrupt controllers. D MA controller#1,#2,interrupt controller#1,#2
disabled. About to disable Video display and Init port -B. About to disable video
display and Init port -B.64K base memory test passed. 64K base memory test
passed.
(13) DMA controller#1,#2 ,interrupt controller#1,#2disa- bled. About to disable
Video display and initialize port -B. Chipset initialize/auto memory detection about
to begin. Replace first memory SIMM.(13)Chipset initialize/auto memory detection
about to begin. Check first SIMM.(13) Interrupt vectors initialized.
(14) Chipset initialization/auto memory detection over. To uncompress the POST
code if compressed BIOS. 8254 timer test about to start. 8254 timer test about to
start.8042 keyboard controller test OK.
(15) POST code is un -compressed.8254 timer about to start. CH-2 timer test
halfway. 8254 CH-2 timer test to be completed. 8254 CH-2 timer test to be
completed. Interrupt vectors initialized. CMOS read/write test OK.
(16) CH-2 timer test over.8254 CH-1 timer test to be completed. CMOS
checksum/battery check OK.
(17) CH-1 timer test over. 8254 CH-0 timer test to be completed. Monochrome
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