Datasheet
Table Of Contents
- 1.0 Introduction
- 2.0 USB3320 Pin Locations and Definitions
- 3.0 Limiting Values
- 4.0 Electrical Characteristics
- 4.1 Operating Current
- 4.2 Clock Specifications
- 4.3 ULPI Interface Timing
- 4.4 Digital IO Pins
- 4.5 DC Characteristics: Analog I/O Pins
- 4.6 Dynamic Characteristics: Analog I/O Pins
- 4.7 OTG Electrical Characteristics
- 4.8 USB Audio Switch Characteristics
- 4.9 Regulator Output Voltages and Capacitor Requirement
- 4.10 Piezoelectric Resonator for Internal Oscillator
- 5.0 Architecture Overview
- FIGURE 5-1: USB3320 Internal Block Diagram
- 5.1 ULPI Digital Operation and Interface
- 5.2 USB 2.0 Hi-Speed Transceiver
- 5.3 Bias Generator
- 5.4 Integrated Low Jitter PLL
- 5.5 Internal Regulators and POR
- 5.6 USB On-The-Go (OTG)
- 5.7 USB UART Support
- 5.8 USB Charger Detection Support
- 5.9 USB Audio Support
- 5.10 Reference Frequency Selection
- 6.0 ULPI Operation
- 6.1 Overview
- 6.2 ULPI Register Access
- 6.3 Low Power Mode
- 6.4 Full Speed/Low Speed Serial Modes
- 6.5 Carkit Mode
- 6.6 RID Converter Operation
- 6.7 Headset Audio Mode
- 7.0 ULPI Register Map
- 8.0 Application Notes
- 8.1 Application Diagram
- TABLE 8-1: Component Values in Application Diagrams
- TABLE 8-2: Capacitance Values at VBUS of USB Connector
- FIGURE 8-1: USB3320 Application Diagram (Device, ULPI Output Clock mode, 24MHz)
- FIGURE 8-2: USB3320 Application Diagram (Device, ULPI Input Clock mode, 60MHz)
- FIGURE 8-3: USB3320 Application Diagram (Host or OTG, ULPI Output Clock Mode, 24MHz)
- 8.2 Reference Designs
- 8.3 ESD Performance
- 8.1 Application Diagram
- 9.0 Package Information
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service

USB3320
DS00001792E-page 56 2014-2016 Microchip Technology Inc.
7.1.3 VENDOR REGISTER ACCESS
The vendor specific registers include the range from 30h to 3Fh. These can be accessed by the ULPI immediate register
read / write.
7.1.3.1 HS TX Boost
Address = 31h (read / write)
7.1.3.2 Headset Audio Mode
Address = 33h (read / write)
7.1.3.3 Vendor Rid Conversion
Address = 36-38h (read), 36h (write), 37h (set), 38h (clear)
Field Name Bit Access Default Description
Reserved 4:0 rd 00000b Read only, 0.
Boost 6:5 rd/w 00b Sets the HS transmitter amplitude as described in
Section 5.2.1.
00b: Nominal
01b: Enables 11.1% increased drive strength
10b: Enables 7.4% increased drive strength
11b: Enables 3.7% increased drive strength
Reserved 7 rd 0b Read only, 0.
Field Name Bit Access Default Description
HeadsetAudioEn 3:0 rd/w 0000b When this field is set to a value of 1010, the Headset
Audio Mode is enabled as described in Section 6.7.
Reserved 7:4 rd 0h Read only, 0.
Field Name Bit Access Default Description
RidValue 2:0 rd/w 000b Conversion value of Rid resistor
000: 0 ohms
001: 75 ohms
010: 100K ohms
011: 200K ohms
100: 440K ohms
101: ID floating
111: Error
Note: RidValue can also be read from the Carkit
Interrupt Status Register.
RidConversionDone 3rd (Note 7-
4)
0b Automatically asserted by the USB3320 when the Rid
Conversion is finished. The conversion will take
282uS. This bit will auto clear when the RidValue is
read from the Rid Conversion Register. Reading the
RidValue from the Carkit Interrupt Status Register will
not clear either RidConversionDone status bit.
Note: RidConversionDone can also be read from
the Carkit Interrupt Status Register.
RidConversionStart 4 rd/w/s/c 0b When this bit is asserted either through a register write
or set, the Rid converter will read the value of the ID
resistor. When the conversion is complete this bit will
auto clear.
Reserved 5 rd/w/s/c 0b This bit must remain at 0.