Datasheet
Table Of Contents
- 1.0 Introduction
- 2.0 USB3320 Pin Locations and Definitions
- 3.0 Limiting Values
- 4.0 Electrical Characteristics
- 4.1 Operating Current
- 4.2 Clock Specifications
- 4.3 ULPI Interface Timing
- 4.4 Digital IO Pins
- 4.5 DC Characteristics: Analog I/O Pins
- 4.6 Dynamic Characteristics: Analog I/O Pins
- 4.7 OTG Electrical Characteristics
- 4.8 USB Audio Switch Characteristics
- 4.9 Regulator Output Voltages and Capacitor Requirement
- 4.10 Piezoelectric Resonator for Internal Oscillator
- 5.0 Architecture Overview
- FIGURE 5-1: USB3320 Internal Block Diagram
- 5.1 ULPI Digital Operation and Interface
- 5.2 USB 2.0 Hi-Speed Transceiver
- 5.3 Bias Generator
- 5.4 Integrated Low Jitter PLL
- 5.5 Internal Regulators and POR
- 5.6 USB On-The-Go (OTG)
- 5.7 USB UART Support
- 5.8 USB Charger Detection Support
- 5.9 USB Audio Support
- 5.10 Reference Frequency Selection
- 6.0 ULPI Operation
- 6.1 Overview
- 6.2 ULPI Register Access
- 6.3 Low Power Mode
- 6.4 Full Speed/Low Speed Serial Modes
- 6.5 Carkit Mode
- 6.6 RID Converter Operation
- 6.7 Headset Audio Mode
- 7.0 ULPI Register Map
- 8.0 Application Notes
- 8.1 Application Diagram
- TABLE 8-1: Component Values in Application Diagrams
- TABLE 8-2: Capacitance Values at VBUS of USB Connector
- FIGURE 8-1: USB3320 Application Diagram (Device, ULPI Output Clock mode, 24MHz)
- FIGURE 8-2: USB3320 Application Diagram (Device, ULPI Input Clock mode, 60MHz)
- FIGURE 8-3: USB3320 Application Diagram (Host or OTG, ULPI Output Clock Mode, 24MHz)
- 8.2 Reference Designs
- 8.3 ESD Performance
- 8.1 Application Diagram
- 9.0 Package Information
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service
2014-2016 Microchip Technology Inc. DS00001792E-page 55
USB3320
7.1.2.3 Carkit Interrupt Status
Address = 20h (read only)
7.1.2.4 Carkit Interrupt Latch
Address = 21h (read only with auto-clear)
Note 7-3 rd: Read Only with auto clear.
RidIntEn 5 rd/w/s/c 0b When enabled an interrupt will be generated on the
alt_int of the RXCMD byte when RidConversionDone
bit is asserted.
Note: This register bit is or’ed with the RidIntEn bit
of the Vendor Rid Conversion register
described in Section 7.1.3.3.
Reserved 7:6 rd 00b Read only, 0.
Field Name Bit Access Default Description
IdFloat 0 rd 0b Asserted when the ID pin is floating. IdPullup must be
enabled.
CarIntDet 1 rd 0b Not Implemented. Reads as 0b.
CarDp 2 rd 0b Not Implemented. Reads as 0b.
RidValue 5:3 rd 000b Conversion value of Rid resistor
000: 0 ohms
001: 75 ohms
010: 102K ohms
011: 200K ohms
100: 440K ohms
101: ID floating
111: Error
Note: RidValue can also be read from the Vendor
Rid Conversion register described in
Section 7.1.3.3.
RidConversionDone 6 rd 0b Automatically asserted by the USB3320 when the Rid
Conversion is finished. The conversion will take
282uS. This bit will auto clear when the RidValue is
read from the Rid Conversion Register. Reading the
RidValue from the Carkit Interrupt Status register will
not clear either RidConversionDone status bit.
Note: RidConversionDone can also be read from
the Vendor Rid Conversion register described
in Section 7.1.3.3.
Reserved 7 rd 0b Read only, 0.
Field Name Bit Access Default Description
IdFloat Latch 0rd (Note 7-
3)
0b Asserted if the state of the ID pin changes from non-
floating to floating while the IdFloatRise bit is enabled
or if the state of the ID pin changes from floating to
non-floating while the IdFloatFall bit is enabled.
CarIntDet Latch 1 rd 0b Not Implemented. Reads as 0b.
CarDp Latch 2 rd 0b Not Implemented. Reads as 0b.
RidConversionLatch 3rd
(Note 7-3)
0b If RidIntEn is set and the state of the
RidConversionDone bit changes from a 0 to 1 this bit
will be asserted.
Reserved 7:4 rd 0000b Read only, 0.
Field Name Bit Access Default Description