Datasheet
Table Of Contents
- 1.0 Introduction
- 2.0 USB3320 Pin Locations and Definitions
- 3.0 Limiting Values
- 4.0 Electrical Characteristics
- 4.1 Operating Current
- 4.2 Clock Specifications
- 4.3 ULPI Interface Timing
- 4.4 Digital IO Pins
- 4.5 DC Characteristics: Analog I/O Pins
- 4.6 Dynamic Characteristics: Analog I/O Pins
- 4.7 OTG Electrical Characteristics
- 4.8 USB Audio Switch Characteristics
- 4.9 Regulator Output Voltages and Capacitor Requirement
- 4.10 Piezoelectric Resonator for Internal Oscillator
- 5.0 Architecture Overview
- FIGURE 5-1: USB3320 Internal Block Diagram
- 5.1 ULPI Digital Operation and Interface
- 5.2 USB 2.0 Hi-Speed Transceiver
- 5.3 Bias Generator
- 5.4 Integrated Low Jitter PLL
- 5.5 Internal Regulators and POR
- 5.6 USB On-The-Go (OTG)
- 5.7 USB UART Support
- 5.8 USB Charger Detection Support
- 5.9 USB Audio Support
- 5.10 Reference Frequency Selection
- 6.0 ULPI Operation
- 6.1 Overview
- 6.2 ULPI Register Access
- 6.3 Low Power Mode
- 6.4 Full Speed/Low Speed Serial Modes
- 6.5 Carkit Mode
- 6.6 RID Converter Operation
- 6.7 Headset Audio Mode
- 7.0 ULPI Register Map
- 8.0 Application Notes
- 8.1 Application Diagram
- TABLE 8-1: Component Values in Application Diagrams
- TABLE 8-2: Capacitance Values at VBUS of USB Connector
- FIGURE 8-1: USB3320 Application Diagram (Device, ULPI Output Clock mode, 24MHz)
- FIGURE 8-2: USB3320 Application Diagram (Device, ULPI Input Clock mode, 60MHz)
- FIGURE 8-3: USB3320 Application Diagram (Host or OTG, ULPI Output Clock Mode, 24MHz)
- 8.2 Reference Designs
- 8.3 ESD Performance
- 8.1 Application Diagram
- 9.0 Package Information
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service
USB3320
DS00001792E-page 52 2014-2016 Microchip Technology Inc.
7.1.1.8 USB Interrupt Enable Rising
Address = 0D-0Fh (read), 0Dh (write), 0Eh (set), 0Fh (clear)
7.1.1.9 USB Interrupt Enable Falling
Address = 10-12h (read), 10h (write), 11h (set), 12h (clear)
DischrgVbus 3 rd/w/s/c 0b This bit is only used during SRP. Connects a resistor
from VBUS to ground to discharge VBUS.
0b: disconnect resistor from VBUS to ground
1b: connect resistor from VBUS to ground
ChrgVbus 4 rd/w/s/c 0b This bit is only used during SRP. Connects a resistor
from VBUS to VDD33 to charge VBUS above the
SessValid threshold.
0b: disconnect resistor from VBUS to VDD33
1b: connect resistor from VBUS to VDD33
DrvVbus 5 rd/w/s/c 0b Enables external 5 volt supply to drive 5 volts on
VBUS. This signal is or’ed with DrvVbusExternal.
0b: Do not drive Vbus, CPEN driven low.
1b: Drive Vbus, CPEN driven high.
DrvVbusExternal 6 rd/w/s/c 0b Enables external 5 volt supply to drive 5 volts on
VBUS. This signal is or’ed with DrvVbus.
0b: Do not drive Vbus, CPEN driven low.
1b: Drive Vbus, CPEN driven high.
UseExternalVbus
Indicator
7 rd/w/s/c 0b Tells the transceiver to use an external VBUS over-
current or voltage indicator. This function is detailed in
Section 5.6.2.
0b: Use the internal VbusValid comparator
1b: Use the EXTVBUS input as for VbusValid signal.
Note: The EXTVBUS signal is always high on the
USB3320.
Field Name Bit Access Default Description
HostDisconnect Rise 0 rd/w/s/c 1b Generate an interrupt event notification when
Hostdisconnect changes from low to high. Applicable
only in host mode.
VbusValid Rise 1 rd/w/s/c 1b Generate an interrupt event notification when
Vbusvalid changes from low to high.
SessValid Rise 2 rd/w/s/c 1b Generate an interrupt event notification when
SessValid changes from low to high.
SessEnd Rise 3 rd/w/s/c 1b Generate an interrupt event notification when SessEnd
changes from low to high.
IdGnd Rise 4 rd/w/s/c 1b Generate an interrupt event notification when IdGnd
changes from low to high.
Reserved 7:5 rd 000b Read only, 0.
Field Name Bit Access Default Description
HostDisconnect Fall 0 rd/w/s/c 1b Generate an interrupt event notification when
Hostdisconnect changes from high to low. Applicable
only in host mode.
VbusValid Fall 1 rd/w/s/c 1b Generate an interrupt event notification when
Vbusvalid changes from high to low.
SessValid Fall 2 rd/w/s/c 1b Generate an interrupt event notification when
SessValid changes from high to low.
Field Name Bit Access Default Description