Datasheet
Table Of Contents
- 1.0 Introduction
- 2.0 USB3320 Pin Locations and Definitions
- 3.0 Limiting Values
- 4.0 Electrical Characteristics
- 4.1 Operating Current
- 4.2 Clock Specifications
- 4.3 ULPI Interface Timing
- 4.4 Digital IO Pins
- 4.5 DC Characteristics: Analog I/O Pins
- 4.6 Dynamic Characteristics: Analog I/O Pins
- 4.7 OTG Electrical Characteristics
- 4.8 USB Audio Switch Characteristics
- 4.9 Regulator Output Voltages and Capacitor Requirement
- 4.10 Piezoelectric Resonator for Internal Oscillator
- 5.0 Architecture Overview
- FIGURE 5-1: USB3320 Internal Block Diagram
- 5.1 ULPI Digital Operation and Interface
- 5.2 USB 2.0 Hi-Speed Transceiver
- 5.3 Bias Generator
- 5.4 Integrated Low Jitter PLL
- 5.5 Internal Regulators and POR
- 5.6 USB On-The-Go (OTG)
- 5.7 USB UART Support
- 5.8 USB Charger Detection Support
- 5.9 USB Audio Support
- 5.10 Reference Frequency Selection
- 6.0 ULPI Operation
- 6.1 Overview
- 6.2 ULPI Register Access
- 6.3 Low Power Mode
- 6.4 Full Speed/Low Speed Serial Modes
- 6.5 Carkit Mode
- 6.6 RID Converter Operation
- 6.7 Headset Audio Mode
- 7.0 ULPI Register Map
- 8.0 Application Notes
- 8.1 Application Diagram
- TABLE 8-1: Component Values in Application Diagrams
- TABLE 8-2: Capacitance Values at VBUS of USB Connector
- FIGURE 8-1: USB3320 Application Diagram (Device, ULPI Output Clock mode, 24MHz)
- FIGURE 8-2: USB3320 Application Diagram (Device, ULPI Input Clock mode, 60MHz)
- FIGURE 8-3: USB3320 Application Diagram (Host or OTG, ULPI Output Clock Mode, 24MHz)
- 8.2 Reference Designs
- 8.3 ESD Performance
- 8.1 Application Diagram
- 9.0 Package Information
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service

USB3320
DS00001792E-page 4 2014-2016 Microchip Technology Inc.
1.0 INTRODUCTION
1.1 General Description
The Microchip USB3320 is a Hi-Speed USB 2.0 Transceiver that provides a configurable physical layer (PHY) solution
and is an excellent match for a wide variety of products.
The frequency of the reference clock is user selectable. The USB3320 includes an internal oscillator that may be used
with either a quartz crystal or a ceramic resonator. Alternatively, the crystal input can be driven by an external clock oscil-
lator. Another option is the use of a 60MHz external clock when using the ULPI Input Clock mode.
Several advanced features make the USB3320 the transceiver of choice by reducing both electrical bill of material
(eBOM) part count and printed circuit board (PCB) area. Outstanding ESD robustness eliminates the need for external
ESD protection devices in typical applications. The internal Over-Voltage Protection circuit (OVP) protects the USB3320
from voltages up to 30V. By using a reference clock from the Link, the USB3320 removes the cost of a dedicated crystal
reference from the design. And the integrated USB switch enables unique product features with a single USB port of
connection.
The USB3320 meets all of the electrical requirements to be used as a Hi-Speed USB Host, Device, or an On-the-Go
(OTG) transceiver. In addition to the supporting USB signaling, the USB3320 also provides USB UART mode and USB
Audio mode.
USB3320 uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB Transceiver to the Link. ULPI
uses a method of in-band signaling and status byte transfers between the Link and transceiver to facilitate a USB ses-
sion with only 12 pins.
The USB3320 uses Microchip’s “wrapper-less” technology to implement the ULPI interface. This “wrapper-less” tech-
nology allows the transceiver to achieve a low latency transmit and receive time. Microchip’s low latency transceiver
allows an existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By adding a bridge to the ASIC the existing
and proven UTMI Link IP can be reused.
FIGURE 1-1: USB3320 BLOCK DIAGRAM
OTG
Hi-Speed
USB
Transceiver
ULPI Interface
ULPI
Registers
and State
Machine
BIAS
Crystal
Oscillator and
Low Jitter
Integrated
PLL
Integrated
Power
Management
VBUS
ID
DP
DM
RBIAS
REFCLK
ESD Protection
DATA[7:0]
CPEN
XO
RESETB
VDD18
VDD33
VBAT
DIR
NXT
STP
CLKOUT
USB
DP/DM
Switch
SPK_L
SPK_R
VDDIO
REFSEL[2:0]