Datasheet
Table Of Contents
- 1.0 Introduction
- 2.0 USB3320 Pin Locations and Definitions
- 3.0 Limiting Values
- 4.0 Electrical Characteristics
- 4.1 Operating Current
- 4.2 Clock Specifications
- 4.3 ULPI Interface Timing
- 4.4 Digital IO Pins
- 4.5 DC Characteristics: Analog I/O Pins
- 4.6 Dynamic Characteristics: Analog I/O Pins
- 4.7 OTG Electrical Characteristics
- 4.8 USB Audio Switch Characteristics
- 4.9 Regulator Output Voltages and Capacitor Requirement
- 4.10 Piezoelectric Resonator for Internal Oscillator
- 5.0 Architecture Overview
- FIGURE 5-1: USB3320 Internal Block Diagram
- 5.1 ULPI Digital Operation and Interface
- 5.2 USB 2.0 Hi-Speed Transceiver
- 5.3 Bias Generator
- 5.4 Integrated Low Jitter PLL
- 5.5 Internal Regulators and POR
- 5.6 USB On-The-Go (OTG)
- 5.7 USB UART Support
- 5.8 USB Charger Detection Support
- 5.9 USB Audio Support
- 5.10 Reference Frequency Selection
- 6.0 ULPI Operation
- 6.1 Overview
- 6.2 ULPI Register Access
- 6.3 Low Power Mode
- 6.4 Full Speed/Low Speed Serial Modes
- 6.5 Carkit Mode
- 6.6 RID Converter Operation
- 6.7 Headset Audio Mode
- 7.0 ULPI Register Map
- 8.0 Application Notes
- 8.1 Application Diagram
- TABLE 8-1: Component Values in Application Diagrams
- TABLE 8-2: Capacitance Values at VBUS of USB Connector
- FIGURE 8-1: USB3320 Application Diagram (Device, ULPI Output Clock mode, 24MHz)
- FIGURE 8-2: USB3320 Application Diagram (Device, ULPI Input Clock mode, 60MHz)
- FIGURE 8-3: USB3320 Application Diagram (Host or OTG, ULPI Output Clock Mode, 24MHz)
- 8.2 Reference Designs
- 8.3 ESD Performance
- 8.1 Application Diagram
- 9.0 Package Information
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service
2014-2016 Microchip Technology Inc. DS00001792E-page 31
USB3320
5.7 USB UART Support
The USB3320 provides support for the USB UART interface as detailed in the ULPI specification and the former CEA-
936A specification. The USB3320 can be placed in UART Mode using the method described in Section 6.5, and the
regulator output will automatically switch to the value configured by the UART RegOutput bits in the USB IO & Power
Management register. While in UART mode, the Linestate signals cannot be monitored on the DATA[0] and DATA[1]
pins.
5.8 USB Charger Detection Support
To support the detection and identification of different types of USB chargers the USB3320 provides integrated pull-up
resistors, R
CD
, on both DP and DM. These pull-up resistors along with the single ended receivers can be used to help
determine the type of USB charger attached. Reference information on implementing charger detection is provided in
Microchip Application Note AN 19.7 - Battery Charging Using Microchip USB Transceivers.
5.9 USB Audio Support
The USB3320 provides two low resistance analog switches that allow analog audio to be multiplexed over the DP and
DM terminals of the USB connector. The audio switches are shown in Figure 5.1. The electrical characteristics of the
USB Audio Switches are provided in Ta bl e 4- 8.
FIGURE 5-12: USB3320 DRIVES CONTROL SIGNAL (CPEN) TO EXTERNAL VBUS SWITCH
TABLE 5-8: USB WEAK PULL-UP ENABLE
RESETB DP Pullup Enable DM Pullup Enable
00 0
1 ChargerPullupEnableDP ChargerPullupEnableDM
Note: ChargerPullupEnableDP and ChargerPullupEnableDM are enabled in the USB IO & Power Management
register.
Note: The USB3320 supports “USB Digital Audio” through the USB protocol in ULPI and USB Serial modes
described in Section 6.0.
VBUS
Switch
OUT
EN
IN
5V
USB Transceiver
VBUS
USB
Connector
DM
DP
VBUS
R
VBUS
CPEN
Link
Controller
CPEN Logic
DrvVbusExternal
DrvVbus
DM
DP
ULPI
+5V
VBUS
Supply