Datasheet
Table Of Contents
- 1.0 Introduction
- 2.0 USB3320 Pin Locations and Definitions
- 3.0 Limiting Values
- 4.0 Electrical Characteristics
- 4.1 Operating Current
- 4.2 Clock Specifications
- 4.3 ULPI Interface Timing
- 4.4 Digital IO Pins
- 4.5 DC Characteristics: Analog I/O Pins
- 4.6 Dynamic Characteristics: Analog I/O Pins
- 4.7 OTG Electrical Characteristics
- 4.8 USB Audio Switch Characteristics
- 4.9 Regulator Output Voltages and Capacitor Requirement
- 4.10 Piezoelectric Resonator for Internal Oscillator
- 5.0 Architecture Overview
- FIGURE 5-1: USB3320 Internal Block Diagram
- 5.1 ULPI Digital Operation and Interface
- 5.2 USB 2.0 Hi-Speed Transceiver
- 5.3 Bias Generator
- 5.4 Integrated Low Jitter PLL
- 5.5 Internal Regulators and POR
- 5.6 USB On-The-Go (OTG)
- 5.7 USB UART Support
- 5.8 USB Charger Detection Support
- 5.9 USB Audio Support
- 5.10 Reference Frequency Selection
- 6.0 ULPI Operation
- 6.1 Overview
- 6.2 ULPI Register Access
- 6.3 Low Power Mode
- 6.4 Full Speed/Low Speed Serial Modes
- 6.5 Carkit Mode
- 6.6 RID Converter Operation
- 6.7 Headset Audio Mode
- 7.0 ULPI Register Map
- 8.0 Application Notes
- 8.1 Application Diagram
- TABLE 8-1: Component Values in Application Diagrams
- TABLE 8-2: Capacitance Values at VBUS of USB Connector
- FIGURE 8-1: USB3320 Application Diagram (Device, ULPI Output Clock mode, 24MHz)
- FIGURE 8-2: USB3320 Application Diagram (Device, ULPI Input Clock mode, 60MHz)
- FIGURE 8-3: USB3320 Application Diagram (Host or OTG, ULPI Output Clock Mode, 24MHz)
- 8.2 Reference Designs
- 8.3 ESD Performance
- 8.1 Application Diagram
- 9.0 Package Information
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service

2014-2016 Microchip Technology Inc. DS00001792E-page 29
USB3320
rupt Enable Rising and USB Interrupt Enable Falling registers. When the interrupts are disabled, the SessVld compar-
ator is not disabled and its state can be read in the USB Interrupt Status register. The SessVld comparator trip point is
detailed in Tab le 4- 7.
5.6.2.3 VbusVld Comparator
The final VBUS comparator is the VbusVld comparator. This comparator is only used when the USB3320 is configured
as an A-device. In the USB protocol the A-device supplies the VBUS voltage and is responsible to ensure it remains
within a specified voltage range. The VbusVld comparator can be disabled by clearing this bit in both the USB Interrupt
Enable Rising and USB Interrupt Enable Falling registers. When disabled, bit 1 of the USB Interrupt Status register will
return a 0. The VbusVld comparator trip points are detailed in Table 4-7.
The internal VbusValid comparator is designed to ensure the VBUS voltage remains above 4.4V.
The USB3320 includes the external vbus valid indicator logic as detail in the ULPI Specification. The external vbus valid
indicator is tied to a logic one. The decoding of this logic is shown in Ta ble 5- 6 below. By default this logic is disabled.
Note 5-3 A peripheral should not use VbusVld to begin operation. The peripheral should use SessVld because
the internal VbusVld threshold can be above the VBUS voltage required for USB peripheral operation.
5.6.2.4 VBUS Pulsing with Pull-up and Pull-down Resistors
In addition to the internal VBUS comparators, the USB3320 also includes the integrated VBUS pull-up and pull-down
resistors used for VBUS Pulsing during OTG Session Request Protocol. To discharge the VBUS voltage so that a Ses-
sion Request can begin, the USB3320 provides a pull-down resistor from VBUS to Ground. This resistor is controlled
by the DischargeVbus bit 3 of the OTG Control register. The pull-up resistor is connected between VBUS and VDD33.
This resistor is used to pull VBUS above 2.1 volts so that the A-Device knows that a USB session has been requested.
The state of the pull-up resistor is controlled by the bit 4 ChargeVbus of the OTG Control register. The Pull-Up and Pull-
Down resistor values are detailed in Table 4-7.
The internal VBUS Pull-up and Pull-down resistors are designed to include the R
VBUS
external resistor in series. This
external resistor is used by the VBUS Overvoltage protection described below.
5.6.2.5 VBUS Input Impedance
The OTG Supplement requires an A-Device that supports Session Request Protocol to have a VBUS input impedance
less than 100kΩ and greater the 40kΩ to ground. The USB3320 provides a 75kΩ resistance to ground, R
VB
. The R
VB
resistor tolerance is detailed in Ta ble 4- 7.
Note: The OTG Supplement specifies a voltage range for A-Device Session Valid and B-Device Session Valid
comparator. The USB3320 transceiver combines the two comparators into one and uses the narrower
threshold range.
TABLE 5-6: EXTERNAL VBUS INDICATOR LOGIC
Typical
Application
Use External
VBus Indicator
Indicator Pass
Thru
Indicator
Complement
RXCMD VBUS Valid
Encoding Source
OTG Device 0 X X Internal VbusVld comparator (Default)
1 1 0 Fixed 1
1 1 1 Fixed 0
1 0 0 Internal VbusVld comparator.
1 0 1 Fixed 0
Standard Host 1 1 0 Fixed 1
1 1 1 Fixed 0
Standard
Peripheral
0 X X Internal VbusVld comparator. This
information should not be used by the Link.
(Note 5-3)