Datasheet
Table Of Contents
- 1.0 Introduction
- 2.0 USB3320 Pin Locations and Definitions
- 3.0 Limiting Values
- 4.0 Electrical Characteristics
- 4.1 Operating Current
- 4.2 Clock Specifications
- 4.3 ULPI Interface Timing
- 4.4 Digital IO Pins
- 4.5 DC Characteristics: Analog I/O Pins
- 4.6 Dynamic Characteristics: Analog I/O Pins
- 4.7 OTG Electrical Characteristics
- 4.8 USB Audio Switch Characteristics
- 4.9 Regulator Output Voltages and Capacitor Requirement
- 4.10 Piezoelectric Resonator for Internal Oscillator
- 5.0 Architecture Overview
- FIGURE 5-1: USB3320 Internal Block Diagram
- 5.1 ULPI Digital Operation and Interface
- 5.2 USB 2.0 Hi-Speed Transceiver
- 5.3 Bias Generator
- 5.4 Integrated Low Jitter PLL
- 5.5 Internal Regulators and POR
- 5.6 USB On-The-Go (OTG)
- 5.7 USB UART Support
- 5.8 USB Charger Detection Support
- 5.9 USB Audio Support
- 5.10 Reference Frequency Selection
- 6.0 ULPI Operation
- 6.1 Overview
- 6.2 ULPI Register Access
- 6.3 Low Power Mode
- 6.4 Full Speed/Low Speed Serial Modes
- 6.5 Carkit Mode
- 6.6 RID Converter Operation
- 6.7 Headset Audio Mode
- 7.0 ULPI Register Map
- 8.0 Application Notes
- 8.1 Application Diagram
- TABLE 8-1: Component Values in Application Diagrams
- TABLE 8-2: Capacitance Values at VBUS of USB Connector
- FIGURE 8-1: USB3320 Application Diagram (Device, ULPI Output Clock mode, 24MHz)
- FIGURE 8-2: USB3320 Application Diagram (Device, ULPI Input Clock mode, 60MHz)
- FIGURE 8-3: USB3320 Application Diagram (Host or OTG, ULPI Output Clock Mode, 24MHz)
- 8.2 Reference Designs
- 8.3 ESD Performance
- 8.1 Application Diagram
- 9.0 Package Information
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service

USB3320
DS00001792E-page 14 2014-2016 Microchip Technology Inc.
4.6 Dynamic Characteristics: Analog I/O Pins
4.7 OTG Electrical Characteristics
TABLE 4-6: DYNAMIC CHARACTERISTICS: ANALOG I/O PINS (DP/DM)
Parameter Symbol Condition MIN TYP MAX Units
FS Output Driver Timing
FS Rise Time T
FR
C
L
= 50pF; 10 to 90% of
|V
OH
- V
OL
|
420ns
FS Fall Time T
FF
C
L
= 50pF; 10 to 90% of
|V
OH
- V
OL
|
420ns
Output Signal Crossover
Voltage
V
CRS
Excluding the first transition
from IDLE state
1.3 2.0 V
Differential Rise/Fall Time
Matching
T
FRFM
Excluding the first transition
from IDLE state
90 111.1 %
LS Output Driver Timing
LS Rise Time T
LR
C
L
= 50-600pF;
10 to 90% of
|V
OH
- V
OL
|
75 300 ns
LS Fall Time T
LF
C
L
= 50-600pF;
10 to 90% of
|V
OH
- V
OL
|
75 300 ns
Differential Rise/Fall Time
Matching
T
LRFM
Excluding the first transition
from IDLE state
80 125 %
HS Output Driver Timing
Differential Rise Time T
HSR
500 ps
Differential Fall Time T
HSF
500 ps
Driver Waveform
Requirements
Eye pattern of Template 1
in USB 2.0 specification
Hi-Speed Mode Timing
Receiver Waveform
Requirements
Eye pattern of Template 4
in USB 2.0 specification
Data Source Jitter and
Receiver Jitter Tolerance
Eye pattern of Template 4
in USB 2.0 specification
TABLE 4-7: OTG ELECTRICAL CHARACTERISTICS
Parameter Symbol Condition MIN TYP MAX Units
SessEnd trip point V
SessEnd
0.2 0.5 0.8 V
SessVld trip point V
SessVld
0.8 1.4 2.0 V
VbusVld trip point V
VbusVld
4.4 4.58 4.75 V
A-Device Impedance R
IdGnd
Maximum A device
Impedance to ground on ID
pin
100 kΩ
ID Float trip point V
IdFloat
1.9 2.2 2.5 V
VBUS Pull-Up R
VPU
VBUS to VDD33 Note 4-8
(ChargeVbus = 1)
1.29 1.34 1.45 kΩ
VBUS Pull-down R
VPD
VBUS to GND Note 4-8
(DisChargeVbus = 1)
1.55 1.7 1.85 kΩ
VBUS Impedance R
VB
VBUS to GND 40 75 100 kΩ
ID pull-up resistance R
ID
IdPullup = 1 80 100 120 kΩ
ID weak pull-up resistance R
IDW
IdPullup = 0 1 MΩ
ID pull-dn resistance R
IDPD
IdGndDrv = 1 1000 Ω