Datasheet
SST25VF080B
DS20005045C-page 24 2015 Microchip Technology Inc.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Microchip Technology Drawing C04-14003A Sheet 1 of 1
8-Lead Small Outline Integrated Circuit (SAE/F) - 5x6 mm Body [SOIC]
Note:
1.
Complies with JEDEC publication 95 MS-012 AA dimensions,
although some dimensions may be more stringent.
2.
All linear dimensions are in millimeters (max/min).
3.
Coplanarity: 0.1 mm
4.
Maximum allowable mold flash is 0.15 mm at the package ends and 0.25 mm between leads.