Datasheet

SST25VF016B
DS20005044C-page 20  2015 Microchip Technology Inc.
TABLE 5-4: CAPACITANCE (T
A
= 25°C, F=1 MHz, OTHER PINS OPEN)
Parameter Description Test Condition Maximum
C
OUT
1
Output Pin Capacitance V
OUT
= 0V 12 pF
C
IN
1
Input Capacitance V
IN
= 0V 6 pF
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 5-5: RELIABILITY CHARACTERISTICS
Symbol Parameter Minimum Specification Units Test Method
N
END
1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
Endurance 10,000 Cycles JEDEC Standard A117
T
DR
1
Data Retention 100 Years JEDEC Standard A103
I
LTH
1
Latch Up 100 + I
DD
mA JEDEC Standard 78
TABLE 5-6: AC OPERATING CHARACTERISTICS
Symbol Parameter
25 MHz 50 MHz
Min Max Min Max Units
F
CLK
1
1. Maximum clock frequency for Read Instruction, 03H, is 25 MHz
Serial Clock Frequency 25 50 MHz
T
SCKH
Serial Clock High Time 18 9ns
T
SCKL
Serial Clock Low Time 18 9ns
T
SCKR
2
2. Maximum Rise and Fall time may be limited by T
SCKH
and T
SCKL
requirements
Serial Clock Rise Time (Slew Rate) 0.1 0.1 V/ns
T
SCKF
Serial Clock Fall Time (Slew Rate) 0.1 0.1 V/ns
T
CES
3
3. Relative to SCK.
CE# Active Setup Time 10 5 ns
T
CEH
3
CE# Active Hold Time 10 5 ns
T
CHS
3
CE# Not Active Setup Time 10 5 ns
T
CHH
3
CE# Not Active Hold Time 10 5 ns
T
CPH
CE# High Time 100 50 ns
T
CHZ
CE# High to High-Z Output 15 8 ns
T
CLZ
SCK Low to Low-Z Output 00ns
T
DS
Data In Setup Time 52ns
T
DH
Data In Hold Time 55ns
T
HLS
HOLD# Low Setup Time 10 5 ns
T
HHS
HOLD# High Setup Time 10 5 ns
T
HLH
HOLD# Low Hold Time 10 5 ns
T
HHH
HOLD# High Hold Time 10 5 ns
T
HZ
HOLD# Low to High-Z Output 20 8 ns
T
LZ
HOLD# High to Low-Z Output 15 8 ns
T
OH
Output Hold from SCK Change 00ns
T
V
Output Valid from SCK 15 8 ns
T
SE
Sector-Erase 25 25 ms
T
BE
Block-Erase 25 25 ms
T
SCE
Chip-Erase 50 50 ms
T
BP
Byte-Program 10 10 µs