Datasheet

www.rovingnetworks.com Version 1.0 12/3/12 page 6
RN4142XV-DS
3.0 TYPICAL APPLICATION
SCHEMATIC
Figure 3-12 shows a typical application schematic.
Because the RN41XV and RN42XV are functionally
compatible, this diagram applies to both modules. The
RN-XV-EK evaluation kit is shown as a reference. The
RN-XV-EK evaluation board provides a 2 x 10 (2-mm)
socket for both the RN41XV and RN41XV modules.
The design offers USB/serial connection to the on-
board UART, a reset switch (pin 5), and switch to con-
trol GPIO4 (pin 8).
FIGURE 3-1: APPLICATION SCHEMATIC, Note 1
Note 1: The RN-XV-EK evaluation kit is shown as a reference.
16 CTS UART CTS flow control, 3.3 V tolerant. To module
17 GPIO3 GPIO, 24 mA drive, 3.3 V tolerant/ADC input. I/O
18 GPIO7 GPIO, 24 mA drive, 3.3 V tolerant/ADC input. I/O
19 AIO0
20 AIO1
TABLE 2-8: PIN DESCRIPTION (PART 2 OF 2)
Pin
Number
Signal Name Description
Optional
Function
Direction
VDD
1
TXD
2
RXD
3
GPI O10
4
RESET
5
GPIO6
6
GPIO9
7
GPIO4
8
GPIO11
9
GND
10
GPIO8
11
RTS
12
GPIO2
13
NC
14
GPIO5
15
CTS
16
GPIO3
17
GPIO7
18
AIO0
19
AIO1
20
M1
VDD3V3
RXD
TXD
GPIO10
GPIO6
GPIO9
GPIO4 GPIO2
GPIO5
AIO0
GPIO3
GPIO7
RTS
CTS
GPIO11
AIO1
100k
R7
100k
R5
RESET
GPIO8
VDD3V3
S1
RESET
S2
Factory Reset
GPIO4
RESET
100k
R6
100k
R4
100k
R3
10k
R2
10k
t
TH1
1
2
3
4
5
6
7
8
9
10
J2
1
2
3
4
5
6
7
8
9
10
J3
VDD3V3
TXD
RXD
CTS
RTS
GPIO10
GPIO6
GPIO9
GPIO4
GPIO8
GPIO2
GPIO5
GPIO3
AIO0
AIO1
GPIO7
GPIO11
RESET_N
1
2
3
4
J4
CONN1X4
62R
R10
62R
R12
62R
R14 GPI O8
GPI O7
GPI O6
i
Power Net
i
Power Net
i Power Net
i
Power Net
i
Power Net
i
Power Net
VBUS
D_N
D_P
TXD
RXD
RTS
CTS
VBUS
RESET
18
3V 3OUT
16
USBDP
14
USBDM
15
GN
D
17
CBUS2
10
CBUS1
21
VCCIO
1
CBUS3
11
CBUS4
9
CBUS0
22
GND
20
RI
3
DCD
7
DSR
6
DTR
31
CTS
8
RTS
32
RXD
2
TXD
30
VCC
19
OSCI
27
OSCO
28
AGND
24
TEST
26
GN
D
4
THPAD
33
FT232RQ
U2
100nF
C5
100nF
C4
100nF
C6
GND
5
D+
3
D-
2
VBUS
1
MTAB
6
USB Mini B
J6
i
Power Net
iPower Net
VDD3V3
iPower Net
iPower NetiPower Net
VBUS
4.7uF
C2
2.2uF
C1
Vin
1
GND
2
Vout
3
Tab
4
U1