Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 92 Preliminary 2015 Microchip Technology Inc.
REGISTER 4-3: SBTxELOG1: SYSTEM BUS TARGET ‘x’ ERROR LOG REGISTER 1
(‘x’ = 0-13)
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
R/W-0, C U-0 U-0 U-0 R/W-0, C R/W-0, C R/W-0, C R/W-0, C
MULTI —CODE<3:0>
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
15:8
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
INITID<7:0>
7:0
R-0 R-0 R-0 R-0 U-0 R-0 R-0 R-0
REGION<3:0> —CMD<2:0>
Legend: C = Clearable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared
bit 31 MULTI: Multiple Permission Violations Status bit
This bit is cleared by writing a ‘1’.
1 = Multiple errors have been detected
0 = No multiple errors have been detected
bit 30-28 Unimplemented: Read as0
bit 27-24 CODE<3:0>: Error Code bits
Indicates the type of error that was detected. These bits are cleared by writing a ‘1’.
1111 = Reserved
1101 = Reserved
0011 = Permission violation
0010 = Reserved
0001 = Reserved
0000 = No error
bit 23-16 Unimplemented: Read as0
bit 15-8 INITID<7:0>: Initiator ID of Requester bits
11111111 = Reserved
00001111 = Reserved
00001110 = Crypto Engine
00001101 = Flash Controller
00001100 = SQI1
00001011 = CAN2
00001010 = CAN1
00001001 = Ethernet Write
00001000 = Ethernet Read
00000111 = USB
00000110 = DMA Write (DMAPRI (CFGCON<25>) = 1)
00000101 = DMA Write (DMAPRI (CFGCON<25>) = 0)
00000100 = DMA Read (DMAPRI (CFGCON<25>) = 1)
00000011 = DMA Read (DMAPRI (CFGCON<25>) = 0)
00000010 = CPU (CPUPRI (CFGCON<24>) = 1)
00000001 = CPU (CPUPRI (CFGCON<25>) = 0)
00000000 = Reserved
Note: Refer to Table 4-6 for the list of available targets and their descriptions.