Datasheet
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 714 Preliminary 2015 Microchip Technology Inc.
DMACON (DMA Controller Control)..........................183
DMASTAT (DMA Status) ..........................................184
DMSTAT (Deadman Timer Status)...........................299
DMTCLR (Deadman Timer Clear) ............................298
DMTCNT (Deadman Timer Count) ...........................300
DMTCON (Deadman Timer Control).........................297
DMTPRECLR (Deadman Timer Preclear) ................297
DMTPSINTV (Post Status Configure DMT Interval Sta-
tus)....................................................................301
EBICSx (External Bus Interface Chip Select) ...........387
EBIFTRPDx (External Bus Interface Flash Timing)..390
EBIMSKx (External Bus Interface Address Mask)....388
EBISMCON (External Bus Interface Static Memory Con-
trol)....................................................................391
EBISMTx (External Bus Interface Static Memory Timing)
389
EMAC1CFG1 (Ethernet Controller MAC Configuration 1)
552
EMAC1CFG2 (Ethernet Controller MAC Configuration 2)
553
EMAC1CLRT (Ethernet Controller MAC Collision Win-
dow/Retry Limit)................................................557
EMAC1IPGR (Ethernet Controller MAC Non-Back-to-
Back Interpacket Gap) ......................................556
EMAC1IPGT (Ethernet Controller MAC Back-to-Back In-
terpacket Gap)..................................................555
EMAC1MADR (Ethernet Controller MAC MII Manage-
ment Address)...................................................563
EMAC1MAXF (Ethernet Controller MAC Maximum
Frame Length) ..................................................558
EMAC1MCFG (Ethernet Controller MAC MII Manage-
ment Configuration) ..........................................561
EMAC1MCMD (Ethernet Controller MAC MII Manage-
ment Command) ...............................................562
EMAC1MIND (Ethernet Controller MAC MII Manage-
ment Indicators) ................................................565
EMAC1MRDD (Ethernet Controller MAC MII Manage-
ment Read Data)...............................................564
EMAC1MWTD (Ethernet Controller MAC MII Manage-
ment Write Data)...............................................564
EMAC1SA0 (Ethernet Controller MAC Station Address
0).......................................................................566
EMAC1SA1 (Ethernet Controller MAC Station Address
1).......................................................................567
EMAC1SA2 (Ethernet Controller MAC Station Address
2).......................................................................568
EMAC1SUPP (Ethernet Controller MAC PHY Support) .
559
EMAC1TEST (Ethernet Controller MAC Test).......... 560
ETHALGNERR (Ethernet Controller Alignment Errors
Statistics) ..........................................................551
ETHCON1 (Ethernet Controller Control 1)................ 530
ETHCON2 (Ethernet Controller Control 2)................ 532
ETHFCSERR (Ethernet Controller Frame Check Se-
quence Error Statistics).....................................550
ETHFRMRXOK (Ethernet Controller Frames Received
OK Statistics) ....................................................549
ETHFRMTXOK (Ethernet Controller Frames Transmit-
ted OK Statistics)..............................................546
ETHHT0 (Ethernet Controller Hash Table 0) ............ 534
ETHHT1 (Ethernet Controller Hash Table 1) ............ 534
ETHIEN (Ethernet Controller Interrupt Enable).........540
ETHIRQ (Ethernet Controller Interrupt Request) ......541
ETHMCOLFRM (Ethernet Controller Multiple Collision
Frames Statistics) .............................................548
ETHPM0 (Ethernet Controller Pattern Match Offset) 536
ETHPMCS (Ethernet Controller Pattern Match Check-
sum).................................................................. 536
ETHPMM0 (Ethernet Controller Pattern Match Mask 0).
535
ETHPMM1 (Ethernet Controller Pattern Match Mask 1).
535
ETHRXFC (Ethernet Controller Receive Filter Configura-
tion)................................................................... 537
ETHRXOVFLOW (Ethernet Controller Receive Overflow
Statistics).......................................................... 545
ETHRXST (Ethernet Controller RX Packet Descriptor
Start Address)................................................... 533
ETHRXWM (Ethernet Controller Receive Watermarks) .
539
ETHSCOLFRM (Ethernet Controller Single Collision
Frames Statistics)............................................. 547
ETHSTAT (Ethernet Controller Status)..................... 543
ETHTXST (Ethernet Controller TX Packet Descriptor
Start Address)................................................... 533
FCCR (Floating Point Condition Codes Register - CP1
Register 25) ........................................................ 56
FCSR (Floating Point Control and Status Register - CP1
Register 31) ........................................................ 59
FENR (Floating Point Exceptions and Modes Enable
Register - CP1 Register 28) ............................... 58
FEXR (Floating Point Exceptions Status Register - CP1
Register 26) ........................................................ 57
FIR (Floating Point Implementation Register - CP1 Reg-
ister 0)................................................................. 55
I2CxCON (I2C Control)............................................. 359
I2CxSTAT (I2C Status)............................................. 361
ICxCON (Input Capture x Control)............................ 310
IECx (Interrupt Enable Control) ................................ 150
IFSx (Interrupt Flag Status) ...................................... 150
INTCON (Interrupt Control)....................................... 146
INTSTAT (Interrupt Status)....................................... 149
IPCx (Interrupt Priority Control) ................................ 151
IPTMR (Interrupt Proximity Timer)............................ 149
NVMADDR (Flash Address) ..................................... 104
NVMBWP (Flash Boot (Page) Write-protect)............ 107
NVMCON (Programming Control) .................... 101, 103
NVMDATAx (Flash Data (’x’ = 0-3)) ......................... 105
NVMKEY (Programming Unlock).............................. 104
NVMPWP (Program Flash Write-Protect)................. 106
NVMSRCADDR (Source Data Address) .................. 105
OCxCON (Output Compare x Control)..................... 315
OSCCON (Oscillator Control)................................... 160
OSCTUN (FRC Tuning)............................................ 162
PMADDR (Parallel Port Address)............................. 377
PMAEN (Parallel Port Pin Enable)............................ 379
PMCON (Parallel Port Control)................................. 373
PMDIN (Parallel Port Input Data)...................... 378, 383
PMDOUT (Parallel Port Output Data)....................... 378
PMMODE (Parallel Port Mode)................................. 375
PMRADDR (Parallel Port Read Address)................. 382
PMSTAT (Parallel Port Status (Slave Modes Only).. 380
PMWADDR (Parallel Port Write Address) ................ 381
PRECON (Prefetch Module Control) ........................ 173
PRESTAT (Prefetch Module Status) ........................ 174
PRISS (Priority Shadow Select) ............................... 147
PSCNT (Post Status Configure DMT Count Status). 300
PWRCON (Power Control) ....................................... 114
REFOxCON (Reference Oscillator Control (’x’ = 1-4)) ...
165