Datasheet
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 706 Preliminary 2015 Microchip Technology Inc.
B.10 Serial Quad Interface (SQI)
On PIC32MZ EF devices, the SQI module supports
double-data-rate (DDR) memories. Refer to
20.0 “Serial Quad Interface (SQI)” and Section 46.
“Serial Quad Interface (SQI)” (DS60001128) for infor-
mation.
B.11 PMP
On PIC32MZ EF devices, the PMP features the ability
to buffer reads and writes in both directions, and can
read and write from different addresses. Refer to
23.0 “Parallel Master Port (PMP)” and Section 43.
“Parallel Master Port” (DS60001346) for information.
B.12 Crypto Engine
Table B-7 lists the changes available for the Crypto
Engine.
TABLE B-7: CRYPTO DIFFERENCES
B.13 Device Configuration and Control
A number of enhancements have been added to the
PIC32MZ EF devices that allow greater control and
flexibility on the device. Some bit fields have also
changed location.
Table B-8 lists these changes.
TABLE B-8: DEVICE CONFIGURATION AND CONTROL DIFFERENCES
PIC32MZ EC Feature PIC32MZ EF Feature
Output Data Format
On PIC32MZ EC devices, the output of the Crypto Engine is
always in big-endian format, usually requiring a software (or
DMA) solution to put the data into little-endian format, which the
core handles natively.
On PIC32MZ EF devices, the SWAPOEN bit (CECON<7>) has
been added to control output byte swapping. This bit, when
enabled, will byte-swap the output.
PIC32MZ EC Feature PIC32MZ EF Feature
MCLR Pin Configuration
On PIC32MZ EC devices, the MCLR pin always generate a
system reset.
On PIC32MZ EF devices, the MCLR pin can now be configured
to generate either a system Reset or an emulated POR Reset.
SMCLR (DEVCFG0<15>)
1 = MCLR pin generates a normal system Reset
0 = MCLR pin generates an emulated POR Reset
I/O Analog Charge Pump
Low VDD environments cause attenuation of analog inputs. A new bit enables an I/O charge pump, which improves analog
performance when operating at lower V
DD.
IOANCPEN (CFGCON<7>)
1 = Charge pump is enabled
0 = Charge pump is disabled
EBI Ready Pin Control
The EBIRDY control bits have been moved.
EBIRDYINV<3:1> (CFGEBIC<30:28>)
EBIRDYEN<3:1> (CFGEBIC<26:24>)
EBIRDYINV<3:1> (CFGEBIC<31:29>)
EBIRDYEN<3:1> (CFGEBIC<27:25>)