Datasheet
2015 Microchip Technology Inc. Preliminary DS60001320B-page 699
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
A.9 Other Peripherals and Features
Most of the remaining peripherals on PIC32MZ EF
devices act identical to their counterparts on PIC32MX
-
5XX/6XX/7XX devices. The main differences have to
do with handling the increased peripheral bus clock
speed and additional clock sources.
Table A-10 lists the differences (indicated by Bold
type) that will affect software and hardware migration.
TABLE A-10: PERIPHERAL DIFFERENCES
PIC32MX5XX/6XX/7XX Feature PIC32MZ EF Feature
I
2
C™
On PIC32MX devices, all pins are 5V-tolerant. On PIC32MZ EF devices, the I2C4 port uses non-5V tolerant
pins, and will have different V
OL/VOH specifications.
The Baud Rate Generator register has been expanded from 12
bits to 16 bits.
I2CxBRG<11:0> I2CxBRG<15:0>
Watchdog Timer
Clearing the Watchdog Timer on PIC32MX5XX/6XX/7XX
devices required writing a ‘1’ to the WDTCLR bit.
On PIC32MZ EF devices, the WDTCLR bit has been replaced
with the 16-bit WDTCLRKEY, which must be written with a spe-
cific value (0x5743) to clear the Watchdog Timer. In addition, the
WDTSPGM (DEVCFG1<21>) bit is used to control operation of
the Watchdog Timer during Flash programming.
WDTCLR (WDTCON<0>) WDTCLRKEY<15:0> (WDTCON<31:16>)
RTCC
On PIC32MX devices, the output of the RTCC pin was selected
between the Seconds Clock or the Alarm Pulse.
On PIC32MZ EF devices, the RTCC Clock is added as an
option. RTCSECSEL has been renamed RTCOUTSEL and
expanded to two bits.
RTCSECSEL (RTCCON<7>)
1 = RTCC Seconds Clock is selected for the RTCC pin
0 = RTCC Alarm Pulse is selected for the RTCC pin
RTCOUTSEL<1:0> (RTCCON<8:7>)
11 = Reserved
10 = RTCC Clock is presented on the RTCC pin
01 = Seconds Clock is presented on the RTCC pin
00 = Alarm Pulse is presented on the RTCC pin when the alarm
interrupt is triggered
On PIC32MX devices, the Secondary Oscillator (S
OSC) serves
as the input clock for the RTCC module.
On PIC32MZ EF devices, an additional clock source, LPRC, is
available as a choice for the input clock.
RTCCLKSEL<1:0> (RTCCON<10:9>)
11 = Reserved
10 = Reserved
01 = RTCC uses the external 32.768 kHz S
OSC
00 = RTCC uses the internal 32 kHz oscillator (LPRC)