Datasheet
2015 Microchip Technology Inc. Preliminary DS60001320B-page 697
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
A.8 Flash Programming
The PIC32MZ EF family of devices incorporates a new
Flash memory technology. Applications ported from
PIC32MX5XX/6XX/7XX devices that take advantage of
Run-time Self Programming will need to adjust the
Flash programming steps to incorporate these
changes.
Table A-9 lists the differences (indicated by Bold type)
that will affect software migration.
TABLE A-9: FLASH PROGRAMMING DIFFERENCES
PIC32MX5XX/6XX/7XX Feature PIC32MZ EF Feature
Program Flash Write Protection
On PIC32MX devices, the Program Flash write-protect bits are
part of the Flash Configuration words (DEVCFG0).
On PIC32MZ EF devices, the write-protect register is contained
separately as the NVMPWP register. It has been expanded to 24
bits, and now represents the address below, which all Flash mem-
ory is protected. Note that the lower 14 bits are forced to zero, so
that all memory locations in the page are protected.
PWP<7:0> (DEVCFG0<19:12>)
11111111 = Disabled
11111110 = 0xBD000FFF
11111101 = 0xBD001FFF
11111100 = 0xBD002FFF
11111011 = 0xBD003FFF
11111010 = 0xBD004FFF
11111001 = 0xBD005FFF
11111000 = 0xBD006FFF
11110111 = 0xBD007FFF
11110110 = 0xBD008FFF
11110101 = 0xBD009FFF
11110100 = 0xBD00AFFF
11110011 = 0xBD00BFFF
11110010 = 0xBD00CFFF
11110001 = 0xBD00DFFF
11110000 = 0xBD00EFFF
11101111 = 0xBD00FFFF
•
•
•
01111111 = 0xBD07FFFF
PWP<23:0> (NVMPWP<23:0>)
Physical memory below address 0x1Dxxxxxx is write protected,
where ‘xxxxxx’ is specified by PWP<23:0>. When PWP<23:0>
has a value of ‘0’, write protection is disabled for the entire pro-
gram Flash. If the specified address falls within the page, the
entire page and all pages below the current page will be pro-
tected.
Code Protection
On PIC32MX devices, code protection is enabled by the CP
(DEVCFG<28>) bit.
On PIC32MZ EF devices, code protection is enabled by the CP
(DEVCP0<28>) bit.
Boot Flash Write Protection
On PIC32MX devices, Boot Flash write protection is enable by
the BWP (DEVCFG<24>) bit and protects the entire Boot Flash
memory.
On PIC32MZ EF devices, Boot Flash write protection is divided
into pages and is enable by the LBWPx and UBWPx bits in the
NVMBWP register.
Low-Voltage Detect Status
LVDSTAT (NVMCON<11>)
1 = Low-voltage event is active
0 = Low-voltage event is not active
The LVDSTAT bit is not available in PIC32MZ EF devices.