Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 64 Preliminary  2015 Microchip Technology Inc.
FIGURE 4-3: MEMORY MAP FOR DEVICES WITH 1024 KB OF PROGRAM MEMORY AND
512
KB OF RAM
(1,2)
Virtual
Memory Map
Physical
Memory Map
0xFFFFFFFF
Reserved Reserved
0xFFFFFFFF
0xF4000000
0xF3FFFFFF
External Memory via
SQI
0xF0000000 0x34000000
Reserved
External Memory via
SQI
0x33FFFFFF
0xE4000000
0xE3FFFFFF
External Memory via
EBI
0x30000000
0xE0000000
Reserved
Reserved
0x24000000
0xD4000000
External Memory via
EBI
0x23FFFFFF
0xD3FFFFFF
External Memory via
SQI
0xD0000000 0x20000000
Reserved Reserved
0xC4000000 0x1FC74000
0xC3FFFFFF
External Memory via
EBI
Boot Flash
(see Figure 4-5)
0x1FC73FFF
0xC0000000
0xBFFFFFFF
Reserved
0x1FC00000
0xBFC74000
Reserved
0xBFC73FFF
Boot Flash
(see Figure 4-5)
0x1F900000
SFRs
(see Table 4-1)
0x1F8FFFFF
0xBFC00000
Reserved
0x1F800000
0xBF900000
Reserved0xBF8FFFFF
SFRs
(see Table 4-1)
0x1D100000
0xBF800000
Program Flash
0x1D0FFFFF
Reserved
0xBD080000 0x1D000000
0xBD0FFFFF
Program Flash
Reserved
0x00080000
0xBD000000
RAM
(3)
0x0007FFFF
Reserved
0x00000000
0xA0020000
0xA007FFFF
RAM
(3)
0xA0000000
Reserved
0x9FC74000
0x9FC73FFF
Boot Flash
(see Figure 4-5)
0x9FC00000
Reserved
0x9D080000
0x9D0FFFFF
Program Flash
0x9D000000
Reserved
0x80020000
0x8007FFFF
RAM
(3)
0x80000000
Reserved
0x00000000
Note 1: Memory areas are not shown to scale.
2: The Cache, MMU, and TLB are initialized by compiler start-up code.
3: RAM memory is divided into two equal banks: RAM Bank 1 and RAM Bank 2 on a half boundary.
4: The MMU must be enabled and the TLB must be set up to access this segment.
KSEG1KSEG0
KSEG3
(4)
(not cacheable)(not cacheable)(cacheable)
KSEG2
(4)
(cacheable)