Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 622 Preliminary  2015 Microchip Technology Inc.
TABLE 37-12: DC CHARACTERISTICS: PROGRAM MEMORY
(3)
DC CHARACTERISTICS
Standard Operating Conditions: 2.1V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  T
A  +85°C for Industrial 
-40°C  T
A  +125°C for Extended
Param.
No.
Sym. Characteristics Min. Typ.
(1)
Max. Units Conditions
D130a E
P Cell Endurance 10,000 — — E/W Without ECC
D130b 20,000 — — E/W With ECC
D131 V
PR VDD for Read VDDMIN —VDDMAX V—
D132 VPEW VDD for Erase or Write VDDMIN —VDDMAX V—
D134a TRETD Characteristic Retention 10 — — Year Without ECC
D134b 20 — — Year With ECC
D135 I
DDP Supply Current during
Programming
——30 mA —
D136 T
RW Row Write Cycle Time (Notes 2, 4) — 66813 — FRC Cycles —
D137 T
QWW Quad Word Write Cycle Time
(Note 4)
—
773 — FRC Cycles —
D138 T
WW Word Write Cycle Time (Note 4) — 383 — FRC Cycles —
D139 TCE Chip Erase Cycle Time (Note 4) — 515373 — FRC Cycles —
D140 TPFE All Program Flash (Upper and Lower
regions) Erase Cycle Time (Note 4)
—
256909 — FRC Cycles —
D141 T
PBE Program Flash (Upper or Lower
regions) Erase Cycle Time (Note 4)
—
128453 — FRC Cycles —
D142 T
PGE Page Erase Cycle Time (Note 4) — 128453 — FRC Cycles —
Note 1: Data in “Typical” column is at 3.3V, +25°C unless otherwise stated.
2: The minimum PBCLK5 for row programming is 4 MHz.
3: Refer to the “PIC32 Flash Programming Specification” (DS60001145) for operating conditions during
programming and erase cycles.
4: This parameter depends on FRC accuracy (see Table 37-20) and FRC tuning values (see the OSCTUN
register: Register 8-2).
TABLE 37-13: DC CHARACTERISTICS: PROGRAM FLASH MEMORY WAIT STATES
DC CHARACTERISTICS
Standard Operating Conditions: 2.1V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  TA  +85°C for Industrial 
-40°C  TA  +125°C for Extended
Required Flash Wait States
(1)
SYSCLK Units Conditions
With ECC:
0 Wait states
1 Wait state
2 Wait states
0 < SYSCLK  66
66 < SYSCLK  133
133 < SYSCLK  200
MHz —
Without ECC:
0 Wait states
1 Wait state
2 Wait states
0 < SYSCLK  83
83 < SYSCLK  166
166 < SYSCLK  200
MHz —
Note 1: To use Wait states, the Prefetch module must be enabled (PREFEN<1:0>  00) and the PFMWS<2:0>
bits must be written with the desired Wait state value.