Datasheet

 2015 Microchip Technology Inc. Preliminary DS60001320B-page 57
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
REGISTER 3-8: FEXR: FLOATING POINT EXCEPTIONS STATUS REGISTER; CP1 REGISTER 26
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
23:16
U-0 U-0 U-0 U-0 U-0 U-0 R/W-x R/W-x
— — — — — —
CAUSE<5:4>
EV
15:8
R/W-x R/W-x R/W-x U-0 U-0 U-0 U-0 U-0
CAUSE<3:0>
— — — —
ZOUI
7:0
U-0 R/W-x R/W-x R/W-x R/W-x R/W-x U-0 U-0
—
FLAGS<4:0>
— —
VZOUI
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-18 Unimplemented: Read as ‘0’
bit 17-12 CAUSE<5:0>: FPU Exception Cause bits
These bits indicated the exception conditions that arise during execution of an FPU arithmetic instruction.
bit 17 E: Unimplemented Operation bit
bit 16 V: Invalid Operation bit
bit 15 Z: Divide-by-Zero bit
bit 14 O: Overflow bit
bit 13 U: Underflow bit
bit 12 I: Inexact bit
bit 11-7 Unimplemented: Read as ‘0’
bit 6-2 FLAGS<4:0>: FPU Flags bits
These bits show any exception conditions that have occurred for completed instructions since the flag was
last reset by software.
bit 6 V: Invalid Operation bit
bit 4 Z: Divide-by-Zero bit
bit 4 O: Overflow bit
bit 3 U: Underflow bit
bit 2 I: Inexact bit
bit 1-0 Unimplemented: Read as ‘0’