Datasheet
2015 Microchip Technology Inc. Preliminary DS60001320B-page 55
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
REGISTER 3-6: FIR: FLOATING POINT IMPLEMENTATION REGISTER; CP1 REGISTER 0
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 R-1 U-0 U-0 U-0 R-1
— — —UFRP— — —FC
23:16
R-1 R-1 R-1 R-1 R-0 R-0 R-1 R-1
HAS2008 F64 L W MIPS3D PS D S
15:8
R-1 R-0 R-1 R-0 R-0 R-1 R-1 R-1
PRID<7:0>
7:0
R-x R-x R-x R-x R-x R-x R-x R-x
REVISION<7:0>
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-29 Unimplemented: Read as ‘0’
bit 28 UFRP: User Mode FR Switching Instruction bit
1 = User mode FR switching instructions are supported
0 = User mode FR switching instructions are not supported
bit 27-25 Unimplemented: Read as ‘0’
bit 24 FC: Full Convert Ranges bit
1 = Full convert ranges are implemented (all numbers can be converted to another type by the FPU)
0 = Full convert ranges are not implemented
bit 23 HAS008: IEEE-754-2008 bit
1 = MAC2008, ABS2008, NAN2008 bits exist within the FCSR register
0 = MAC2009, ABS2008, and NAN2008 bits do not exist within the FCSR register
bit 22 F64: 64-bit FPU bit
1 = This is a 64-bit FPU
0 = This is not a 64-bit FPU
bit 21 L: Long Fixed Point Data Type bit
1 = Long fixed point data types are implemented
0 = Long fixed point data types are not implemented
bit 20 W: Word Fixed Point data type bit
1 = Word fixed point data types are implemented
0 = Word fixed point data types are not implemented
bit 19 MIPS3D: MIPS-3D ASE bit
1 = MIPS-3D is implemented
0 = MIPS-3D is not implemented
bit 18 PS: Paired Single Floating Point data bit
1 = PS floating point is implemented
0 = PS floating point is not implemented
bit 17 D: Double-precision floating point data bit
1 = Double-precision floating point data types are implemented
0 = Double-precision floating point data types are not implemented
bit 16 S: Single-precision Floating Point Data bit
1 = Single-precision floating point data types are implemented
0 = Single-precision floating point data types are not implemented
bit 15-8 PRID<7:0>: Processor Identification bits
These bits allow software to distinguish between the various types of MIPS processors. For
PIC32 devices with the M-Class core, this value is 0xA7.
bit 7-0 REVISION<7:0>: Processor Revision Identification bits
These bits allow software to distinguish between one revision and another of the same processor type. This
number is increased on major revisions of the processor core