Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 528 Preliminary 2015 Microchip Technology Inc.
2110
ETH
FRMTXOK
31:16 0000
15:0 FRMTXOKCNT<15:0>
0000
2120
ETH
SCOLFRM
31:16
0000
15:0 SCOLFRMCNT<15:0> 0000
2130
ETH
MCOLFRM
31:16
0000
15:0 MCOLFRMCNT<15:0>
0000
2140
ETH
FRMRXOK
31:16 0000
15:0 FRMRXOKCNT<15:0>
0000
2150
ETH
FCSERR
31:16
0000
15:0 FCSERRCNT<15:0> 0000
2160
ETH
ALGNERR
31:16
0000
15:0 ALGNERRCNT<15:0>
0000
2200
EMAC1
CFG1
31:16 0000
15:0
SOFT
RESET
SIM
RESET
RESET
RMCS
RESET
RFUN
RESET
TMCS
RESET
TFUN
LOOPBACK TXPAUSE RXPAUSE PASSALL RXENABLE
800D
2210
EMAC1
CFG2
31:16 0000
15:0
EXCESS
DFR
BP
NOBKOFF
NOBKOFF LONGPRE PUREPRE AUTOPAD VLANPAD
PAD
ENABLE
CRC
ENABLE
DELAYCRC HUGEFRM LENGTHCK FULLDPLX
4082
2220
EMAC1
IPGT
31:16
0000
15:0 B2BIPKTGP<6:0> 0012
2230
EMAC1
IPGR
31:16
0000
15:0 NB2BIPKTGP1<6:0> NB2BIPKTGP2<6:0>
0C12
2240
EMAC1
CLRT
31:16 0000
15:0 CWINDOW<5:0> RETX<3:0>
370F
2250
EMAC1
MAXF
31:16
0000
15:0 MACMAXF<15:0> 05EE
2260
EMAC1
SUPP
31:16
0000
15:0
RESET
RMII
SPEED
RMII
1000
2270
EMAC1
TEST
31:16
0000
15:0
TESTBP TESTPAUSE
SHRTQNTA
0000
2280
EMAC1
MCFG
31:16
0000
15:0
RESET
MGMT
CLKSEL<3:0> NOPRE SCANINC 0020
2290
EMAC1
MCMD
31:16
0000
15:0 SCAN READ
0000
22A0
EMAC1
MADR
31:16 0000
15:0 PHYADDR<4:0> REGADDR<4:0>
0100
TABLE 30-5: ETHERNET CONTROLLER REGISTER SUMMARY (CONTINUED)
Virtual Address
(BF88_#)
Register
Name
(1)
Bit Range
Bits
All Resets
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: All registers in this table (with the exception of ETHSTAT) have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.3 “CLR, SET, and
INV Registers” for more information.
2: Reset values default to the factory programmed value.