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ManualsBrandsMicrochip ManualsEmbedded Processors & ControllersMicrocontroller 32 Bit TQFP-64
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2015 Microchip Technology Inc. Preliminary DS60001320B-page 479
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
REGISTER 28-28: ADCEIEN1: ADC EARLY INTERRUPT ENABLE REGISTER 1
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
EIEN31
(1)
EIEN30
(1)
EIEN29
(1)
EIEN28
(1)
EIEN27
(1)
EIEN26
(1)
EIEN25
(1)
EIEN24
(1)
23:16
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
EIEN23
(1)
EIEN22
(1)
EIEN21
(1)
EIEN20
(1)
EIEN19
(1)
EIEN18 EIEN17 EIEN16
15:8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
EIEN15 EIEN14 EIEN13 EIEN12 EIEN11 EIEN10 EIEN9 EIEN8
7:0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
EIEN7 EIEN6 EIEN5 EIEN4 EIEN3 EIEN2 EIEN1 EIEN0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-0 EIEN31:EIEN0: Early Interrupt Enable for Analog Input bits
1 = Early Interrupts are enabled for the selected analog input. The interrupt is generated after the early
interrupt event occurs (indicated by the EIRDYx bit ('x' = 31-0) of the ADCEISTAT1 register)
0 = Interrupts are disabled
Note 1: This bit is not available on 64-pin devices.
REGISTER 28-29: ADCEIEN2: ADC EARLY INTERRUPT ENABLE REGISTER 2
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
15:8
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — — EIEN44
(2)
EIEN43
(2)
EIEN42
(2)
EIEN41
(2)
EIEN40
(2)
7:0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
EIEN39
(2)
EIEN38
(2)
EIEN37
(2)
EIEN36
(2)
EIEN35
(2)
EIEN34
(1)
EIEN33
(1)
EIEN32
(1)
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-13 Unimplemented: Read as ‘0’
bit 12-0 EIEN44:EIEN32: Early Interrupt Enable for Analog Input bits
1 = Early Interrupts are enabled for the selected analog input. The interrupt is generated after the early
interrupt event occurs (indicated by the EIRDYx bit ('x' = 44-32) of the ADCEISTAT2 register)
0 = Interrupts are disabled
Note 1: This bit is not available on 64-pin devices.
2: This bit is not available on 64-pin and 100-pin devices.