Datasheet
2015 Microchip Technology Inc. Preliminary DS60001320B-page 465
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
bit 24 AFRDY: Digital Filter ‘x’ Data Ready Status bit
1 = Data is ready in the FLTRDATA<15:0> bits
0 = Data is not ready
Note: This bit is cleared by reading the FLTRDATA<15:0> bits or by disabling the Digital Filter module
(by setting AFEN to ‘0’).
bit 23-21 Unimplemented: Read as ‘0’
bit 20-16 CHNLID<4:0>: Digital Filter Analog Input Selection bits
These bits specify the analog input to be used as the oversampling filter data source.
11111 = AN31
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00010 = AN2
00001 = AN1
00000 = AN0
Note: Only the first 32 analog inputs (Class 1 and Class 2) can use a digital filter.
bit 15-0 FLTRDATA<15:0>: Digital Filter ‘x’ Data Output Value bits
The filter output data is as per the fractional format set in the FRACT (ADCCON1<23>) bit. The FRACT bit
should not be changed while the filter is enabled. Changing the state of the FRACT bit after the operation
of the filter ended will not update the value of FLTRDATA<15:0> to reflect the new format.
REGISTER 28-16: ADCFLTRx: ADC DIGITAL FILTER ‘x’ REGISTER (‘x’ = 1 THROUGH 6)