Datasheet

 2015 Microchip Technology Inc. Preliminary DS60001320B-page 463
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
REGISTER 28-15: ADCCMPx: ADC DIGITAL COMPARATOR ‘x’ LIMIT VALUE REGISTER 
(‘x’ = 1 THROUGH 6)
Bit Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
DCMPHI<15:8>
(1,2,3)
23:16
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
DCMPHI<7:0>
(1,2,3)
15:8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
DCMPLO<15:8>
(1,2,3)
7:0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
DCMPLO<7:0>
(1,2,3)
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-16 DCMPHI<15:0>: Digital Comparator ‘x’ High Limit Value bits
(1,2,3)
These bits store the high limit value, which is used by digital comparator for comparisons with ADC
converted data.
bit 15-0 DCMPLO<15:0>: Digital Comparator ‘x’ Low Limit Value bits
(1,2,3)
These bits store the low limit value, which is used by digital comparator for comparisons with ADC
converted data.
Note 1: Changing theses bits while the Digital Comparator is enabled (ENDCMP = 1) can result in unpredictable
behavior.
2: The format of the limit values should match the format of the ADC converted value in terms of sign and
fractional settings.
3: For Digital Comparator 0 used in CVD mode, the DCMPHI<15:0> and DCMPLO<15:0> bits must always
be specified in signed format, as the CVD output data is differential and is always signed.