Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 458 Preliminary 2015 Microchip Technology Inc.
REGISTER 28-8: ADCGIRQEN1: ADC GLOBAL INTERRUPT ENABLE REGISTER 1
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
AGIEN31
(1)
AGIEN30
(1)
AGIEN29
(1)
AGIEN28
(1)
AGIEN27
(1)
AGIEN26
(1)
AGIEN25
(1)
AGIEN24
(1)
23:16
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
AGIEN23
(1)
AGIEN22
(1)
AGIEN21
(1)
AGIEN20
(1)
AGIEN19
(1)
AGIEN18 AGIEN17 AGIEN16
15:8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
AGIEN15 AGIEN14 AGIEN13 AGIEN12 AGIEN11 AGIEN10 AGIEN9 AGIEN8
7:0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
AGIEN7 AGIEN6 AGIEN5 AGIEN4 AGIEN3 AGIEN2 AGIEN1 AGIEN0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-0 AGIEN31:AGIEN0: ADC Global Interrupt Enable bits
1 = Interrupts are enabled for the selected analog input. The interrupt is generated after the converted data
is ready (indicated by the ARDYx bit (‘x’ = 31-0) of the ADCDSTAT1 register)
0 = Interrupts are disabled
Note 1: This bit is not available on 64-pin devices.
REGISTER 28-9: ADCGIRQEN2: ADC GLOBAL INTERRUPT ENABLE REGISTER 2
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
15:8
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
AGIEN44
(2)
AGIEN43
(2)
AGIEN42
(2)
AGIEN41
(2)
AGIEN40
(2)
7:0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
AGIEN39
(2)
AGIEN38
(2)
AGIEN37
(2)
AGIEN36
(2)
AGIEN35
(2)
AGIEN34
(1)
AGIEN33
(1)
AGIEN32
(1)
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-13 Unimplemented: Read as0
bit 12-0 AGIEN44:AGIEN32 ADC Global Interrupt Enable bits
1 = Interrupts are enabled for the selected analog input. The interrupt is generated after the converted data
is ready (indicated by the ARDYx bit (‘x’ = 44-32) of the ADCDSTAT2 register)
0 = Interrupts are disabled
Note 1: This bit is not available on 64-pin devices.
2: This bit is not available on 64-pin and 100-pin devices.