Datasheet
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 442 Preliminary 2015 Microchip Technology Inc.
REGISTER 28-2: ADCCON2: ADC CONTROL REGISTER 2
Bit Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
R-0, HS, HC R-0, HS, HC R-0, HS, HC R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
BGVRRDY REFFLT EOSRDY CVDCPL<2:0> SAMC<9:8>
23:16
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
SAMC<7:0>
15:8
R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0
BGVRIEN REFFLTIEN EOSIEN ADCEIOVR — ADCEIS<2:0>
7:0
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— ADCDIV<6:0>
Legend: HC = Hardware Set HS = Hardware Cleared r = Reserved
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31 BGVRRDY: Band Gap Voltage/ADC Reference Voltage Status bit
1 = Both band gap voltage and ADC reference voltages (V
REF) are ready
0 = Either or both band gap voltage and ADC reference voltages (V
REF) are not ready
Data processing is valid only after BGVRRDY is set by hardware, so the application code must check that
the BGVRRDY bit is set to ensure data validity. This bit set to ‘0’ when ON (ADCCON1<15>) = 0.
bit 30 REFFLT: Band Gap/V
REF/AVDD BOR Fault Status bit
1 = Fault in band gap or the VREF voltage while the ON bit (ADCCON1<15>) was set. Most likely a band
gap or V
REF fault will be caused by a BOR of the analog VDD supply.
0 = Band gap and V
REF voltage are working properly
This bit is cleared when the ON bit (ADCCON1<15>) = 0 and the BGVRRDY bit = 1.
bit 29 EOSRDY: End of Scan Interrupt Status bit
1 = All analog inputs are considered for scanning through the scan trigger (all analog inputs specified in
the ADCCSS1 and ADCCSS2 registers) have completed scanning
0 = Scanning has not completed
This bit is cleared when ADCCON2<31:24> are read in software.
bit 28-26 CVDCPL<2:0>: Capacitor Voltage Divider (CVD) Setting bit
111 = 7 * 2.5 pF = 17.5 pF
110 = 6 * 2.5 pF = 15 pF
101 = 5 * 2.5 pF = 12.5 pF
100 = 4 * 2.5 pF = 10 pF
011 = 3 * 2.5 pF = 7.5 pF
010 = 2 * 2.5 pF = 5 pF
001 = 1 * 2.5 pF = 2.5 pF
000 = 0 * 2.5 pF = 0 pF
bit 25-16 SAMC<9:0>: Sample Time for the Shared ADC (ADC7) bits
1111111111 = 1025 T
AD
7
•
•
•
0000000001 = 3 TAD
7
0000000000 = 2 TAD
7
Where TAD
7
= period of the ADC conversion clock for the Shared ADC (ADC7) controlled by the
ADCDIV<6:0> bits.
bit 15 BGVRIEN: Band Gap/V
REF Voltage Ready Interrupt Enable bit
1 = Interrupt will be generated when the BGVRDDY bit is set
0 = No interrupt is generated when the BGVRRDY bit is set