Datasheet

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PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family

DS60001320B-page 440 Preliminary  2015 Microchip Technology Inc.

bit 20-16 STRGSRC<4:0>: Scan Trigger Source Select bits

11111 = Reserved

•

01101 = Reserved

01100 = Comparator 2 (COUT)

01011 = Comparator 1 (COUT)

01010 = OCMP5

01001 = OCMP3

01000 = OCMP1

00111 = TMR5 match

00110 = TMR3 match

00101 = TMR1 match

00100 = INT0 External interrupt

00011 = Reserved

00010 = Global level software trigger (GLSWTRG)

00001 = Global software edge trigger (GSWTRG)

00000 = No Trigger

bit 15 ON: ADC Module Enable bit

1 = ADC module is enabled

0 = ADC module is disabled

Note: The ON bit should be set only after the ADC module has been configured.

bit 14 Unimplemented: Read as ‘0’

bit 13 SIDL: Stop in Idle Mode bit

1 = Discontinue module operation when device enters Idle mode

0 = Continue module operation in Idle mode

bit 12 Reserved: Read as ‘1’; must be written as ‘1’.

bit 11 CVDEN: Capacitive Voltage Division Enable bit

1 = CVD operation is enabled

0 = CVD operation is disabled

bit 10 FSSCLKEN: Fast Synchronous System Clock to ADC Control Clock bit

1 = Fast synchronous system clock to ADC control clock is enabled

0 = Fast synchronous system clock to ADC control clock is disabled

bit 9 FSPBCLKEN: Fast Synchronous Peripheral Clock to ADC Control Clock bit

1 = Fast synchronous peripheral clock to ADC control clock is enabled

0 = Fast synchronous peripheral clock to ADC control clock is disabled

bit 8-7 Unimplemented: Read as ‘0’

bit 6-4 IRQVS<2:0>: Interrupt Vector Shift bits

To determine interrupt vector address, this bit specifies the amount of left shift done to the ARDYx status

bits in the ADCDSTAT1 and ADCDSTAT2 registers, prior to adding with the ADCBASE register.

Interrupt Vector Address = Read Value of ADCBASE and Read Value of ADCBASE = Value written to

ADCBASE + x << IRQVS<2:0>, where ‘x’ is the smallest active input ID from the ADCDSTAT1 or

ADCDSTAT2 registers (which has highest priority).

111 = Shift x left 7 bit position

110 = Shift x left 6 bit position

101 = Shift x left 5 bit position

100 = Shift x left 4 bit position

011 = Shift x left 3 bit position

010 = Shift x left 2 bit position

001 = Shift x left 1 bit position

000 = Shift x left 0 bit position