Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 408 Preliminary 2015 Microchip Technology Inc.
REGISTER 26-5: CESTAT: CRYPTO ENGINE STATUS REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
ERRMODE<2:0> ERROP<2:0> ERRPHASE<1:0>
23:16
U-0 U-0 R-0 R-0 R-0 R-0 R-0 R-0
BDSTATE<3:0> START ACTIVE
15:8
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
BDCTRL<15:8>
7:0
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
BDCTRL<7:0>
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-29 ERRMODE<2:0>: Internal Error Mode Status bits
111 = Reserved
110 = Reserved
101 = Reserved
100 = Reserved
011 = CEK operation
010 = KEK operation
001 = Preboot authentication
000 = Normal operation
bit 28-26 ERROP<2:0>: Internal Error Operation Status bits
111 = Reserved
110 = Reserved
101 = Reserved
100 = Authentication
011 = Reserved
010 = Decryption
001 = Encryption
000 = Reserved
bit 25-24 ERRPHASE<1:0>: Internal Error Phase of DMA Status bits
11 = Destination data
10 = Source data
01 = Security Association (SA) access
00 = Buffer Descriptor (BD) access
bit 23-22 Unimplemented: Read as ‘0
bit 21-18 BDSTATE<3:0>: Buffer Descriptor Processor State Status bits
The current state of the BDP:
1111 = Reserved
0111 = Reserved
0110 = SA fetch
0101 = Fetch BDP is disabled
0100 = Descriptor is done
0011 = Data phase
0010 = BDP is loading
0001 = Descriptor fetch request is pending
0000 = BDP is idle
bit 17 START: DMA Start Status bit
1 = DMA start has occurred
0 = DMA start has not occurred