Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 406 Preliminary  2015 Microchip Technology Inc.
REGISTER 26-2: CECON: CRYPTO ENGINE CONTROL REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
15:8
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
7:0
R/W-0 R/W-0, HC R/W-0 U-0 U-0 R/W-0 R/W-0 R/W-0
SWAPOEN SWRST SWAPEN — — BDPCHST BDPPLEN DMAEN
Legend: HC = Hardware Cleared
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-8 Unimplemented: Read as ‘0’
bit 7 SWAPOEN: Swap Output Data Enable bit
1 = Output data is byte swapped when written by dedicated DMA
0 = Output data is not byte swapped when written by dedicated DMA
bit 6 SWRST: Software Reset bit
1 = Initiate a software reset of the Crypto Engine
0 = Normal operation
bit 5 SWAPEN: Input Data Swap Enable bit
1 = Input data is byte swapped when read by dedicated DMA
0 = Input data is not byte swapped when read by dedicated DMA
bit 4-3 Unimplemented: Read as ‘0’
bit 2 BDPCHST: Buffer Descriptor Processor (BDP) Fetch Enable bit
This bit should be enabled only after all DMA descriptor programming is completed.
1 = BDP descriptor fetch is enabled
0 = BDP descriptor fetch is disabled
bit 1 BDPPLEN: Buffer Descriptor Processor Poll Enable bit
This bit should be enabled only after all DMA descriptor programming is completed.
1 = Poll for descriptor until valid bit is set
0 = Do not poll
bit 0 DMAEN: DMA Enable bit
1 = Crypto Engine DMA is enabled
0 = Crypto Engine DMA is disabled