Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 350 Preliminary  2015 Microchip Technology Inc.
REGISTER 20-23: SQI1TAPCON: SQI TAP CONTROL REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
15:8
U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — CLKINDLY<5:0>
7:0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
DATAOUTDLY<3:0> CLKOUTDLY<3:0>
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-14 Unimplemented: Read as ‘0’
bit 13-8 CLKINDLY<5:0>: SQI Clock Input Delay bits
These bits are used to add fractional delays to SQI Clock Input while sampling the incoming data.
111111 = 64 taps added on clock input
111110 = 63 taps added on clock input
•
•
•
000001 = 2 taps added on clock input
000000 = 1 tap added on clock input
bit 7-4 DATAOUTDLY<3:0>: SQI Data Output Delay bits
These bits are used to add fractional delays to SQI Data Output while writing the data to the Flash.
1111 = 16 taps added on clock output
1110 = 15 taps added on clock output
•
•
•
0001 = 2 taps added on clock output
0000 = 1 tap added on clock output
bit 3-0 CLKOUTDLY<3:0>: SQI Clock Output Delay bits
These bits are used to add fractional delays to SQI Clock Output while writing the data to the Flash.
1111 = 16 taps added on clock output
1110 = 15 taps added on clock output
•
•
•
0001 = 2 taps added on clock output
0000 = 1 tap added on clock output