Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 340 Preliminary 2015 Microchip Technology Inc.
REGISTER 20-9: SQI1INTSTAT: SQI INTERRUPT STATUS REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
15:8
U-0 U-0 U-0 U-0 R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS
DMA
EIF
PKT
COMPIF
BD
DONEIF
CON
THRIF
7:0
R/W-1, HS R/W-0, HS R/W-1, HS R/W-0, HS R/W-1, HS R/W-1, HS R/W-0, HS R/W-1, HS
CON
EMPTYIF
CON
FULLIF
RXTHRIF
(1)
RXFULLIF
RX
EMPTYIF
TXTHRIF TXFULLIF
TX
EMPTYIF
Legend: HS = Hardware Set
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-12 Unimplemented: Read as ‘0
bit 11 DMAEIF: DMA Bus Error Interrupt Flag bit
1 = DMA bus error has occurred
0 = DMA bus error has not occurred
bit 10 PKTCOMPIF: DMA Buffer Descriptor Processor Packet Completion Interrupt Flag bit
1 = DMA BD packet is complete
0 = DMA BD packet is in progress
bit 9 BDDONEIF: DMA Buffer Descriptor Done Interrupt Flag bit
1 = DMA BD process is done
0 = DMA BD process is in progress
bit 8 CONTHRIF: Control Buffer Threshold Interrupt Flag bit
1 = The control buffer has more than THRES words of space available
0 = The control buffer has less than THRES words of space available
bit 7 CONEMPTYIF: Control Buffer Empty Interrupt Flag bit
1 = Control buffer is empty
0 = Control buffer is not empty
bit 6 CONFULLIF: Control Buffer Full Interrupt Flag bit
1 = Control buffer is full
0 = Control buffer is not full
bit 5 RXTHRIF: Receive Buffer Threshold Interrupt Flag bit
(1)
1 = Receive buffer has more than RXINTTHR words of space available
0 = Receive buffer has less than RXINTTHR words of space available
bit 4 RXFULLIF: Receive Buffer Full Interrupt Flag bit
1 = Receive buffer is full
0 = Receive buffer is not full
bit 3 RXEMPTYIF: Receive Buffer Empty Interrupt Flag bit
1 = Receive buffer is empty
0 = Receive buffer is not empty
Note 1: In the case of Boot/XIP mode, the POR value of the receive buffer threshold is zero. Therefore, this bit will
be set to a ‘1’, immediately after a POR until a read request on the System Bus bus is received.
Note: The bits in the register are cleared by writing a '1' to the corresponding bit position.