Datasheet

2015 Microchip Technology Inc. Preliminary DS60001320B-page 337
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
REGISTER 20-6: SQI1CMDTHR: SQI COMMAND THRESHOLD REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
15:8
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
TXCMDTHR<4:0>
7:0
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
RXCMDTHR<4:0>
(1)
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-13 Unimplemented: Read as ‘0
bit 12-8 TXCMDTHR<4:0>: Transmit Command Threshold bits
In transmit initiation mode, the SQI module performs a transmit operation when transmit command
threshold bytes are present in the TX FIFO. These bits should usually be set to ‘1’ for normal Flash
commands, and set to a higher value for page programming. For 16-bit mode, the value should be a
multiple of 2.
bit 7-5 Unimplemented: Read as ‘0
bit 4-0 RXCMDTHR<4:0>: Receive Command Threshold bits
(1)
In receive initiation mode, the SQI module attempts to perform receive operations to fetch the receive com-
mand threshold number of bytes in the receive buffer. If space for these bytes is not present in the FIFO,
the SQI will not initiate a transfer. For 16-bit mode, the value should be a multiple of 2.
If software performs any reads, thereby reducing the FIFO count, hardware would initiate a receive transfer
to make the FIFO count equal to the value in these bits. If software would not like any more words latched
into the FIFO, command initiation mode needs to be changed to Idle before any FIFO reads by software.
In the case of Boot/XIP mode, the SQI module will use the System Bus burst size, instead of the receive
command threshold value.
Note 1: These bits should only be programmed when a receive is not active (i.e., during Idle mode or a transmit).