Datasheet

2015 Microchip Technology Inc. Preliminary DS60001320B-page 295
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
15.0 DEADMAN TIMER (DMT)
The primary function of the Deadman Timer (DMT) is
to reset the processor in the event of a software mal
-
function. The DMT is a free-running instruction fetch
timer, which is clocked whenever an instruction fetch
occurs until a count match occurs. Instructions are not
fetched when the processor is in Sleep mode.
The DMT consists of a 32-bit counter with a time-out
count match value as specified by the DMTCNT<3:0>
bits in the DEVCFG1 Configuration register.
A Deadman Timer is typically used in mission critical
and safety critical applications, where any single fail
-
ure of the software functionality and sequencing must
be detected.
Figure 15-1 shows a block diagram of the Deadman
Timer module.
FIGURE 15-1: DEADMAN TIMER BLOCK DIAGRAM
Note: This data sheet summarizes the features
of the PIC32MZ EF family of devices. It is
not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 9. “Watchdog, Deadman, and
Power-up Timers” (DS60001114) in the
“PIC32 Family Reference Manual”, which
is available from the Microchip web site
(www.microchip.com/PIC32).
32-bit counter
ON
PBCLK7
“Proper Clear Sequence” Flag
ON
Clock
ON
DMT Count Reset Load
DMT event
System Reset
System Reset
Instruction Fetched Strobe
Force DMT Event
“improper sequence” flag
32
(COUNTER) DMT Window Interval
(2)
Window Interval Open
(COUNTER) = DMT Max Count
(1)
Counter Initialization Value
Note 1: DMT Max Count is controlled by the DMTCNT<3:0> bits in the DEVCFG1 Configuration register.
2: DMT Window Interval is controlled by the DMTINTV<2:0> bits in the DEVCFG1 Configuration register.
3: Refer to Section 6.0 “Resets” for more information.
to NMI
(3)