Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 28 Preliminary  2015 Microchip Technology Inc.
TABLE 1-12: PMP PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
64-pin
QFN/
TQFP
100-pin
TQFP
124-pin
VTLA
144-pin
TQFP/
LQFP
PMA0 30 44 B24 30 I/O TTL/ST Parallel Master Port Address bit 0 Input (Buffered
Slave modes) and Output (Master modes)
PMA1 29 43 A28 51 I/O TTL/ST Parallel Master Port Address bit 1 Input (Buffered
Slave modes) and Output (Master modes)
PMA2 10 16 B9 21 O — Parallel Master Port Address (Demultiplexed Master
modes)
PMA3 6 12 B7 52 O —
PMA4 5 11 A8 68 O —
PMA5 4 2 B1 2 O —
PMA6 16 6 B3 6 O —
PMA7 22 33 A23 48 O —
PMA8 42 65 A44 91 O —
PMA9 41 64 B36 90 O —
PMA10 21 32 B18 47 O —
PMA11 27 41 A27 29 O —
PMA12 24 7 A6 11 O —
PMA13 23 34 B19 28 O —
PMA14 45 61 A42 87 O —
PMA15 43 68 B38 97 O —
PMCS1 45 61 A42 87 O — Parallel Master Port Chip Select 1 Strobe
PMCS2 43 68 B38 97 O — Parallel Master Port Chip Select 2 Strobe
PMD0 58 91 B52 135 I/O TTL/ST Parallel Master Port Data (Demultiplexed Master
mode) or Address/Data (Multiplexed Master modes)
PMD1 61 94 A64 138 I/O TTL/ST
PMD2 62 98 A66 142 I/O TTL/ST
PMD3 63 99 B56 143 I/O TTL/ST
PMD4 64 100 A67 144 I/O TTL/ST
PMD5 1 3 A3 3 I/O TTL/ST
PMD6 2 4 B2 4 I/O TTL/ST
PMD7 3 5 A4 5 I/O TTL/ST
PMD8 — 88 B50 128 I/O TTL/ST
PMD9 — 87 A60 127 I/O TTL/ST
PMD10 — 86 B49 125 I/O TTL/ST
PMD11 — 85 A59 124 I/O TTL/ST
PMD12 — 79 B43 112 I/O TTL/ST
PMD13 — 80 A54 113 I/O TTL/ST
PMD14 — 77 B42 110 I/O TTL/ST
PMD15 — 78 A53 111 I/O TTL/ST
PMALL 30 44 B24 30 O — Parallel Master Port Address Latch Enable Low Byte
(Multiplexed Master modes)
PMALH 29 43 A28 51 O — Parallel Master Port Address Latch Enable High Byte
(Multiplexed Master modes)
PMRD 53 9 A7 13 O — Parallel Master Port Read Strobe
PMWR 52 8 B5 12 O — Parallel Master Port Write Strobe
Legend: CMOS = CMOS-compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input
TTL = Transistor-transistor Logic input buffer PPS = Peripheral Pin Select