Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 266 Preliminary 2015 Microchip Technology Inc.
TABLE 12-12: PORTE REGISTER MAP FOR 64-PIN DEVICES ONLY
Virtual Address
(BF86_#)
Register
Name
(1)
Bit Range
Bits
All
Resets
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
0400 ANSELE
31:16 0000
15:0 ANSE7 ANSE6 ANSE5 ANSE4 00F0
0410 TRISE
31:16 0000
15:0 TRISE7 TRISE6 TRISE5 TRISE4 TRISE3 TRISE2 TRISE1 TRISE0 00FF
0420 PORTE
31:16 0000
15:0 RE7 RE6 RE5 RE4 RE3 RE2 RE1 RE0 xxxx
0430 LATE
31:16 0000
15:0 LATE7 LATE6 LATE5 LATE4 LATE3 LATE2 LATE1 LATE0 xxxx
0440 ODCE
31:16 0000
15:0 ODCE7 ODCE6 ODCE5 ODCE4 ODCE3 ODCE2 ODCE1 ODCE0 0000
0450 CNPUE
31:16 0000
15:0 CNPUE7 CNPUE6 CNPUE5 CNPUE4 CNPUE3 CNPUE2 CNPUE1 CNPUE0 0000
0460 CNPDE
31:16 0000
15:0 CNPDE7 CNPDE6 CNPDE5 CNPDE4 CNPDE3 CNPDE2 CNPDE1 CNPDE0 0000
0470 CNCONE
31:16 0000
15:0 ON SIDL
EDGE
DETECT
0000
0480 CNENE
31:16 0000
15:0 CNENE7 CNENE6 CNENE5 CNENE4 CNENE3 CNENE2 CNENE1 CNENE0 0000
0490 CNSTATE
31:16 0000
15:0
CN
STATE7
CN
STATE6
CN
STATE5
CN
STATE4
CN
STATE3
CN
STATE2
CN
STATE1
CN
STATE0
0000
04A0 CNNEE
31:16 0000
15:0 CNNEE7 CNNEE6 CNNEE5 CNNEE4 CNNEE3 CNNEE2 CNNEE1 CNNEE0 0000
04B0 CNFE
31:16 0000
15:0 CNFE7 CNFE6 CNFE5 CNFE4 CNFE3 CNFE2 CNFE1 CNFE0 0000
04C0 SRCON0E
31:16 0000
15:0 SR0E3 SR0E2 SR0E1 SR0E0 0000
04D0 SRCON1E
31:16 0000
15:0 SR1E3 SR1E2 SR1E1 SR1E0 0000
Legend: x = Unknown value on Reset; — = Unimplemented, read as ‘0’; Reset values are shown in hexadecimal.
Note 1: All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See Section 12.3 “CLR, SET, and INV Registers” for
more information.