Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 250 Preliminary  2015 Microchip Technology Inc.
12.1 Parallel I/O (PIO) Ports
All port pins have up to 14 registers directly associated
with their operation as digital I/O. The data direction
register (TRISx) determines whether the pin is an input
or an output. If the data direction bit is a ‘1’, then the pin
is an input. All port pins are defined as inputs after a
Reset. Reads from the latch (LATx) read the latch.
Writes to the latch write the latch. Reads from the port
(PORTx) read the port pins, while writes to the port pins
write the latch.
12.1.1 OPEN-DRAIN CONFIGURATION
In addition to the PORTx, LATx, and TRISx registers for
data control, some port pins can also be individually
configured for either digital or open-drain output. This is
controlled by the Open-Drain Control register, ODCx,
associated with each port. Setting any of the bits con
-
figures the corresponding pin to act as an open-drain
output.
The open-drain feature allows the generation of out-
puts higher than VDD (e.g., 5V) on any desired 5V-tol-
erant pins by using external pull-up resistors. The
maximum open-drain voltage allowed is the same as
the maximum VIH specification.
Refer to the pin name tables (Table 2 through Table 5)
for the available pins and their functionality.
12.1.2 CONFIGURING ANALOG AND
DIGITAL PORT PINS
The ANSELx register controls the operation of the
analog port pins. The port pins that are to function as
analog inputs must have their corresponding ANSEL
and TRIS bits set. In order to use port pins for I/O
functionality with digital modules, such as Timers,
UARTs, etc., the corresponding ANSELx bit must be
cleared.
The ANSELx register has a default value of 0xFFFF;
therefore, all pins that share analog functions are
analog (not digital) by default.
If the TRIS bit is cleared (output) while the ANSELx bit
is set, the digital output level (V
OH or VOL) is converted
by an analog peripheral, such as the ADC module or
Comparator module.
When the PORT register is read, all pins configured as
analog input channels are read as cleared (a low level).
Pins configured as digital inputs do not convert an
analog input. Analog levels on any pin defined as a
digital input (including the ANx pins) can cause the
input buffer to consume current that exceeds the
device specifications.
12.1.3 I/O PORT WRITE/READ TIMING
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically this instruction
would be an NOP.
12.1.4 INPUT CHANGE NOTIFICATION
The input change notification function of the I/O ports
allows the PIC32MZ EF devices to generate interrupt
requests to the processor in response to a change-of-
state on selected input pins. This feature can detect
input change-of-states even in Sleep mode, when the
clocks are disabled. Every I/O port pin can be selected
(enabled) for generating an interrupt request on a
change-of-state.
Five control registers are associated with the CN func-
tionality of each I/O port. The CNENx registers contain
the CN interrupt enable control bits for each of the input
pins. Setting any of these bits enables a CN interrupt
for the corresponding pins.
The CNSTATx register indicates whether a change
occurred on the corresponding pin since the last read
of the PORTx bit.
Each I/O pin also has a weak pull-up and a weak
pull-down connected to it. The pull-ups act as a
current source or sink source connected to the pin,
and eliminate the need for external resistors when
push-button or keypad devices are connected. The
pull-ups and pull-downs are enabled separately using
the CNPUx and the CNPDx registers, which contain
the control bits for each of the pins. Setting any of
the control bits enables the weak pull-ups and/or
pull-downs for the corresponding pins.
An additional control register (CNCONx) is shown in
Register 12-3.
Note: Pull-ups and pull-downs on change
notification pins should always be
disabled when the port pin is configured as
a digital output.