Datasheet
2015 Microchip Technology Inc. Preliminary DS60001320B-page 249
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
12.0 I/O PORTS
General purpose I/O pins are the simplest of
peripherals. They allow the PIC32MZ EF family device
to monitor and control other devices. To add flexibility
and functionality, some pins are multiplexed with
alternate function(s). These functions depend on which
peripheral features are on the device. In general, when
a peripheral is functioning, that pin may not be used as
a general purpose I/O pin.
Some of the key features of the I/O ports are:
• Individual output pin open-drain enable/disable
• Individual input pin weak pull-up and pull-down
• Monitor selective inputs and generate interrupt
when change in pin state is detected
• Operation during Sleep and Idle modes
• Fast bit manipulation using CLR, SET and INV
registers
Figure 12-1 illustrates a block diagram of a typical
multiplexed I/O port.
FIGURE 12-1: BLOCK DIAGRAM OF A TYPICAL MULTIPLEXED PORT STRUCTURE
Note: This data sheet summarizes the features
of the PIC32MZ EF family of devices. It is
not intended to be a comprehensive refer
-
ence source. To complement the informa-
tion in this data sheet, refer to Section 12.
“I/O Ports” (DS60001120) in the “PIC32
Family Reference Manual”, which is avail-
able from the Microchip web site
(www.microchip.com/PIC32).
Peripheral Output Data
Peripheral Module
Peripheral Output Enable
PIO Module
Peripheral Module Enable
WR LAT
I/O Pin
WR PORT
Data Bus
RD LAT
RD PORT
RD TRIS
WR TRIS
0
1
RD ODC
PBCLK4
QD
CK
EN
Q
QD
CK
EN
Q
QD
CK
EN
Q
Q
D
CK
Q
QD
CK
Q
0
1
PBCLK4
WR ODC
ODC
TRIS
LAT
Sleep
1
0
1
0
Output Multiplexers
I/O Cell
Synchronization
R
Peripheral Input
Legend: R = Peripheral input buffer types may vary. Refer to Table 1-1 for peripheral details.
Note: This block diagram is a general representation of a shared port/peripheral structure for illustration purposes only. The actual structure
for any specific port/peripheral combination may be different than it is shown here.
Peripheral Input Buffer
Port Control
PBCLK4