Datasheet
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 242 Preliminary 2015 Microchip Technology Inc.
REGISTER 11-26: USBTMCON1: USB TIMING CONTROL REGISTER 1
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-1 R/W-0 R/W-1
THHSRTN<15:8>
23:16
R/W-1 R/W-1 R/W-1 R/W-0 R/W-0 R/W-1 R/W-1 R/W-0
THHSRTN<7:0>
15:8
R/W-0 R/W-1 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
TUCH<15:8>
7:0
R/W-0 R/W-1 R/W-1 R/W-1 R/W-0 R/W-1 R/W-0 R/W-0
TUCH<7:0>
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-16
THHSRTN:<15:0>: Hi-Speed Resume Signaling Delay bits
These bits set the delay from the end of Hi-Speed resume signaling (acting as a Host) to enable the UTM
normal operating mode.
bit 15-0
TUCH<15:0>: Chirp Time-out bits
These bits set the chirp time-out. This number, when multiplied by 4, represents the number of USB module
clock cycles before the time-out occurs.
Note: Use of this register will allow the Hi-Speed time-out to be set to values that are greater than the maximum
specified in the USB 2.0 specification, making the USB module non-compliant.
REGISTER 11-27: USBTMCON2: USB TIMING CONTROL REGISTER 2
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
15:8
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
7:0
U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0
— — — — THBST<3:0>
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-4 Unimplemented: Read as ‘0’
bit 3-0
THBST<3:0>: High Speed Time-out Adder bits
These bits represent the value to be added to the minimum high speed time-out period of 736 bit times. The
time-out period can be increased in increments of 64 Hi-Speed bit times (133 ns).
Note: Use of this register will allow the Hi-Speed time-out to be set to values that are greater than the maximum
specified in the USB 2.0 specification, making the USB module non-compliant.