Datasheet
2015 Microchip Technology Inc. Preliminary DS60001320B-page 241
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
REGISTER 11-24: USBExRPC: USB ENDPOINT ‘x’ REQUEST PACKET COUNT REGISTER (HOST
MODE ONLY) (‘x’ = 1-7)
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
15:8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
RQPKTCNT<15:8>
7:0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
RQPKTCNT<7:0>
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-16
Unimplemented: Read as ‘0’
bit 15-0
RQPKTCNT<15:0>: Request Packet Count bits
Sets the number of packets of size MAXP that are to be transferred in a block transfer. This register is only
available in Host mode when AUTOREQ is set.
REGISTER 11-25: USBDPBFD: USB DOUBLE PACKET BUFFER DISABLE REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
23:16
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0
EP7TXD EP6TXD EP5TXD EP4TXD EP3TXD EP2TXD EP1TXD —
15:8
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
7:0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0
EP7RXD EP6RXD EP5RXD EP4RXD EP3RXD EP2RXD EP1RXD —
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-17
EP7TXD:EP1TXD: TX Endpoint ‘x’ Double Packet Buffer Disable bits
1 = TX double packet buffering is disabled for endpoint ‘x’
0 = TX double packet buffering is enabled for endpoint ‘x’
bit 16 Unimplemented: Read as ‘0’
bit 15-1
EP7RXD:EP1RXD: RX Endpoint ‘x’ Double Packet Buffer Disable bits
1 = RX double packet buffering is disabled for endpoint ‘x’
0 = RX double packet buffering is enabled for endpoint ‘x’
bit 0 Unimplemented: Read as ‘0’