Datasheet

 2015 Microchip Technology Inc. Preliminary DS60001320B-page 229
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
REGISTER 11-13: USBOTG: USB OTG CONTROL/STATUS REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — — RXDPB RXFIFOSZ<3:0>
23:16
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — — TXDPB TXFIFOSZ<3:0>
15:8
U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0
— — — — — — TXEDMA RXEDMA
7:0
R-1 R-0 R-0 R-0 R-0 R-0 R/W-0, HC R/W-0
BDEV FSDEV LSDEV VBUS<1:0> HOSTMODE HOSTREQ SESSION
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-29 Unimplemented: Read as ‘0’
bit 28 RXDPB: RX Endpoint Double-packet Buffering Control bit
1 = Double-packet buffer is supported. This doubles the size set in RXFIFOSZ.
0 = Double-packet buffer is not supported
bit 27-24 RXFIFOSZ<3:0>: RX Endpoint FIFO Packet Size bits
The maximum packet size to allowed for (before any splitting within the FIFO of Bulk/High-Bandwidth
packets prior to transmission)
1111 = Reserved
•
•
•
1010 = Reserved
1001 = 4096 bytes
1000 = 2048 bytes
0111 = 1024 bytes
0110 = 512 bytes
0101 = 256 bytes
0100 = 128 bytes
0011 = 64 bytes
0010 = 32 bytes
0001 = 16 bytes
0000 = 8 bytes
bit 23-21 Unimplemented: Read as ‘0’
bit 20 TXDPB: TX Endpoint Double-packet Buffering Control bit
1 = Double-packet buffer is supported. This doubles the size set in TXFIFOSZ.
0 = Double-packet buffer is not supported