Datasheet

 2015 Microchip Technology Inc. Preliminary DS60001320B-page 227
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
bit 15-8
RXINTERV<7:0>: Endpoint RX Polling Interval/NAK Limit bits
For Interrupt and Isochronous transfers, this field defines the polling interval for the endpoint. For Bulk end-
points, this field sets the number of frames/microframes after which the endpoint should time out on receiving
a stream of NAK responses.
The following table describes the valid values and meaning for this field:
bit 7-6
SPEED<1:0>: RX Endpoint Operating Speed Control bits
11 = Low-Speed
10 = Full-Speed
01 = Hi-Speed
00 = Reserved
bit 5-4
PROTOCOL<1:0>: RX Endpoint Protocol Control bits
11 = Interrupt
10 = Bulk
01 = Isochronous
00 = Control
bit 3-0
TEP<3:0>: RX Target Endpoint Number bits
This value is the endpoint number contained in the TX endpoint descriptor returned to the USB module during
device enumeration.
REGISTER 11-11: USBIENCSR3: USB INDEXED ENDPOINT CONTROL STATUS REGISTER 3
(ENDPOINT 1-7) (CONTINUED)
Transfer Type Speed Valid Values (m) Interpretation
Interrupt Low/Full 0x01 to 0xFF Polling interval is ‘m’ frames.
High 0x01 to 0x10 Polling interval is 2
(m-1)
frames.
Isochronous Full or High 0x01 to 0x10 Polling interval is 2
(m-1)
frames/microframes.
Bulk Full or High 0x02 to 0x10 NAK limit is 2
(m-1)
frames/microframes. A
value of ‘0’ or ‘1’ disables the NAK time-out
function.