Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family DS60001320B-page 200 Preliminary  2015 Microchip Technology Inc.
FIGURE 11-1: PIC32MZ EF FAMILY USB INTERFACE DIAGRAM
Endpoint Control
EP0
Control
Host
EPO
Control
Function
EP1 - EP7
Control
Host
Transaction
Scheduler
Interrupt
Control
EP Reg
Decoder
Common
Regs
Cycle
Control
FIFO
Decoder
RAM
Packet
Encode/Decode
Link Power
Management
Combine Endpoints
Packet Encode
Packet Decode
CRC Gen/Check
Data Sync
HS Negotiation
HNP/SRP
Timers
USB 2.0
HS PHY
UTM
Synchronization
DMA
Requests
Interrupts
System Bus
Slave mode
Transmit
Receive
RAM Controller
RX
Buff
TX
Buff
Cycle Control
RX
Buff
TX
Buff
USB PLL
POSC
(12 MHz or 24 MHz only)
UPLLFSEL
USBCLK
D+
D-
USBID
VUSB3V3
VBUS