Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family DS60001320B-page 176 Preliminary  2015 Microchip Technology Inc.
10.1 DMA Control Registers
TABLE 10-1: DMA GLOBAL REGISTER MAP
Virtual Address
(BF81_#)
Register
Name
(1)
Bit Range
Bits
All Resets
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
1000 DMACON
31:16 — — — — — — — — — — — — — — — — 0000
15:0 ON — — SUSPEND DMABUSY — — — — — — — — — — — 0000
1010 DMASTAT
31:16 RDWR — — — — — — — — — — — — — — — 0000
15:0 — — — — — — — — — — — — — DMACH<2:0> 0000
1020 DMAADDR
31:16
DMAADDR<31:0>
0000
15:0 0000
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See Section 12.3 “CLR, SET, and INV Registers” for
more information.
TABLE 10-2: DMA CRC REGISTER MAP
Virtual Address
(BF81_#)
Register
Name
(1)
Bit Range
Bits
All Resets
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
1030 DCRCCON
31:16 — — BYTO<1:0> WBO — — BITO — — — — — — — — 0000
15:0 — — — PLEN<4:0> CRCEN CRCAPP CRCTYP — — CRCCH<2:0> 0000
1040 DCRCDATA
31:16
DCRCDATA<31:0>
0000
15:0 0000
1050 DCRCXOR
31:16
DCRCXOR<31:0>
0000
15:0 0000
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.3 “CLR, SET, and INV Registers” for
more information.