Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family DS60001320B-page 172 Preliminary  2015 Microchip Technology Inc.
9.1 Prefetch Control Registers
TABLE 9-1: PREFETCH REGISTER MAP
Virtual Address
(BF8E_#)
Register
Name
(1)
Bit Range
Bits
All Resets
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
0000 PRECON
31:16 — — — — — PFMSECEN — — — — — — — — — — 0000
15:0
— — — — — — — — — — PREFEN<1:0> — PFMWS<2:0>
0007
0010 PRESTAT
31:16 — — — — PFMDED PFMSEC — — — — — — — — — — 0000
15:0 — — — — — — — —
PFMSECCNT<7:0>
0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See Section 12.3 “CLR, SET, and INV Registers” for
more information.