Datasheet

 2015 Microchip Technology Inc. Preliminary DS60001320B-page 165
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
REGISTER 8-4: REFOxCON: REFERENCE OSCILLATOR CONTROL REGISTER (‘x’ = 1-4)
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— RODIV<14:8>
23:16
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
RODIV<7:0>
15:8
R/W-0 U-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0, HC R-0, HS, HC
ON
(1)
—SIDLOE
RSLP
(2)
— DIVSWEN
ACTIVE
(1)
7:0
U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0
— — — —
ROSEL<3:0>
(3)
Legend: HC = Hardware Cleared HS = Hardware Set
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31 Unimplemented: Read as ‘0’
bit 30-16 RODIV<14:0> Reference Clock Divider bits
The value selects the reference clock divider bits (see Figure 8-1 for details). A value of ‘0’ selects no divider.
bit 15 ON: Output Enable bit
(1)
1 = Reference Oscillator Module enabled
0 = Reference Oscillator Module disabled
bit 14 Unimplemented: Read as ‘0’
bit 13 SIDL: Peripheral Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
bit 12 OE: Reference Clock Output Enable bit
1 = Reference clock is driven out on REFCLKOx pin
0 = Reference clock is not driven out on REFCLKOx pin
bit 11 RSLP: Reference Oscillator Module Run in Sleep bit
(2)
1 = Reference Oscillator Module output continues to run in Sleep
0 = Reference Oscillator Module output is disabled in Sleep
bit 10 Unimplemented: Read as ‘0’
bit 9 DIVSWEN: Divider Switch Enable bit
1 = Divider switch is in progress
0 = Divider switch is complete
bit 8 ACTIVE: Reference Clock Request Status bit
(1)
1 = Reference clock request is active
0 = Reference clock request is not active
bit 7-4 Unimplemented: Read as ‘0’
bit 3-0 ROSEL<3:0>: Reference Clock Source Select bits
(3)
1111 = Reserved
•
•
•
1001 = BFRC
1000 =REFCLKIx
0111 = System PLL output
0110 = Reserved
0101 =S
OSC
0100 =LPRC
0011 =FRC
0010 =P
OSC
0001 = PBCLK1
0000 = SYSCLK
Note 1: Do not write to this register when the ON bit is not equal to the ACTIVE bit.
2: This bit is ignored when the ROSEL<3:0> bits = 0000 or 0001.
3: The ROSEL<3:0> bits should not be written while the ACTIVE bit is ‘1’, as undefined behavior may result.