Datasheet
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 160 Preliminary 2015 Microchip Technology Inc.
REGISTER 8-1: OSCCON: OSCILLATOR CONTROL REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
— — — — — FRCDIV<2:0>
23:16
R/W-0 U-0 R/W-y U-0 U-0 U-0 U-0 U-0
DRMEN — SLP2SPD
(1)
— — — — —
15:8
U-0 R-0 R-0 R-0 U-0 R/W-y R/W-y R/W-y
—COSC<2:0>—NOSC<2:0>
7:0
R/W-0 U-0 U-0 R/W-0 R/W-0, HS U-0 R/W-y R/W-y
CLKLOCK — — SLPEN CF — SOSCEN OSWEN
(1)
Legend: y = Value set from Configuration bits on POR HS = Hardware Set
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-27 Unimplemented: Read as ‘0’
bit 26-24 FRCDIV<2:0>: Internal Fast RC (FRC) Oscillator Clock Divider bits
111 = FRC divided by 256
110 = FRC divided by 64
101 = FRC divided by 32
100 = FRC divided by 16
011 = FRC divided by 8
010 = FRC divided by 4
001 = FRC divided by 2
000 = FRC divided by 1 (default setting)
bit 23 DRMEN: Dream Mode Enable bit
1 = Dream mode is enabled
0 = Dream mode is disabled
bit 22 Unimplemented: Read as ‘0’
bit 21 SLP2SPD: Sleep 2-speed Startup Control bit
(1)
1 = Use FRC as SYSCLK until selected clock is ready
0 = Use the selected clock directly
bit 20-15 Unimplemented: Read as ‘0’
bit 14-12 COSC<2:0>: Current Oscillator Selection bits
111 = Internal Fast RC (FRC) Oscillator divided by FRCDIV<2:0> bits (FRCDIV)
110 = Back-up Fast RC (BFRC) Oscillator
101 = Internal Low-Power RC (LPRC) Oscillator
100 = Secondary Oscillator (S
OSC)
011 = Reserved
010 = Primary Oscillator (POSC) (HS or EC)
001 = System PLL (SPLL)
000 = Internal Fast RC (FRC) Oscillator divided by FRCDIV<2:0> bits (FRCDIV)
bit 11 Unimplemented: Read as ‘0’
Note 1: The reset value for this bit depends on the setting of the IESO (DEVCFG1<7>) bit. When IESO = 1, the
reset value is ‘1’. When IESO = 0, the reset value is ‘0’.
Note: Writes to this register require an unlock sequence. Refer to Section 42. “Oscillators with Enhanced
PLL” (DS60001250) in the “PIC32 Family Reference Manual” for details.