Datasheet

 2015 Microchip Technology Inc. Preliminary DS60001320B-page 157
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
TABLE 8-1: SYSTEM AND PERIPHERAL CLOCK DISTRIBUTION
8.1 Fail-Safe Clock Monitor (FSCM)
The PIC32MZ EF oscillator system includes a Fail-safe
Clock Monitor (FSCM). The FSCM monitors the
SYSCLK for continuous operation. If it detects that the
SYSCLK has failed, it switches the SYSCLK over to the
BFRC oscillator and triggers a NMI. The BFRC is an
untuned 8 MHz oscillator that will drive the SYSCLK
during FSCM event. When the NMI is executed, soft
-
ware can attempt to restart the main oscillator or shut
down the system.
In Sleep mode both the SYSCLK and the FSCM halt,
which prevents FSCM detection.
Peripheral
Clock Source
FRC
LPRC
SOSC
SYSCLK
USBCLK
PBCLK1
(1)
PBCLK2 PBCLK3 PBCLK4 PBCLK5 PBCLK7 PBCLK8
REFCLKO1 REFCLKO2 REFCLKO3
CPU X
WDT X X
(2)
Deadman Timer X
(2)
X
Flash X
(2)
X
(2)
X
(2)
ADC X X X
(3)
X
Comparator X
Crypto X
RNG X
USB X X
(3)
CAN X
Ethernet X
(3)
PMP X
I
2
C™ X
UART X
RTCC X X X
(2)
EBI X
SQI X
(3)
X
SPI X X
Timers X
(4)
X
Output Compare X
Input Capture X
Ports X
DMA X
Interrupts X
Prefetch X
OSC2 Pin X
(5)
Note 1: PBCLK1 is used by system modules and cannot be turned off.
2: SYSCLK/PBCLK1 is used to fetch data from/to the Flash Controller, while the FRC clock is used for
programming.
3: Special Function Register (SFR) access only.
4: Timer1 only.
5: PBCLK1 divided by 2 is available on the OSC2 pin in certain clock modes.